Browsing by Author S. R. Das

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Showing results 1 to 7 of 7
DateTitleAuthor(s)File
2002(IEEE Instrumentation and Measurement Technology Conference, p601-p606)An Efficient BIST Method for Non-Traditional Faults of Embedded Method ArraysW. B. Jone; D. C. Huang; S. R. Das; 國立中興大學資訊科學與工程學系-
2003(IEEE Instrumentation and Measurement Technology Conference, p700-p705)A Parallel Built-In Self-Diagnostic Method for Non-Traditional Faults of Embedded Memory ArraysV. Arora; W. B. Jone; D. C. Huang; S. R. Das; 國立中興大學資訊科學與工程學系
2001( IEEE Proceedings of the 14th International Conference on VLSI Design, p379-p384)An Efficient Parallel Transparent BIST Method for Multiple Embedded Memory BuffersD. C. Huang; W. B. Jone; S. R. Das; 國立中興大學資訊科學與工程學系
2001(IEEE Proceedings of the 14th International Conference on VLSI Design, p397-p402)A Parallel Built-In Self-Diagnostic Method for Embedded Memory BuffersD. C. Huang; W. B. Jone; S. R. Das; 國立中興大學資訊科學與工程學系
2003(IEEE Transactions on Instrumentation and Measurement,52(5):1381-1390)An efficient BIST method for non-traditional faults of embedded memory arraysW. B. Jone; D. C. Huang; S. R. Das; 國立中興大學資訊科學與工程學系
2004(IEEE Transactions on Instrumentation and Measurement,53(4):915-932)A Parallel Built-In Self-Diagnostic Method for Non-Traditional Faults of Embedded Memory ArraysV. Arora; W. B. Jone; D. C. Huang; S. R. Das; 國立中興大學資訊科學與工程學系
2001(VLSI Design:An International Journal of Custom-Chip Design,Simulation and Testing,00(0):001-018)Defect Level Estimation for Pseudorandom Testing Using Stochastic AnalysisW. B. Jone; D. C. Huang; S. C. Chang; S. R. Das; 國立中興大學資訊科學與工程學系