Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/10445
DC FieldValueLanguage
dc.contributor吳忠幟zh_TW
dc.contributorChung-Chih Wuen_US
dc.contributor王安邦zh_TW
dc.contributor張守進zh_TW
dc.contributor李清庭zh_TW
dc.contributor韋忠光zh_TW
dc.contributor葉永輝zh_TW
dc.contributorAn-Bang Wangen_US
dc.contributorShoon-Jinn Changen_US
dc.contributorChing-Ting Leeen_US
dc.contributorChung-Kuang Weien_US
dc.contributorYung-Hui Yehen_US
dc.contributor.advisor武東星zh_TW
dc.contributor.advisorDong-Sing Wuuen_US
dc.contributor.author蔣承忠zh_TW
dc.contributor.authorChiang, Cheng-Chungen_US
dc.contributor.other中興大學zh_TW
dc.date2009zh_TW
dc.date.accessioned2014-06-06T06:45:10Z-
dc.date.available2014-06-06T06:45:10Z-
dc.identifierU0005-0708200719592000zh_TW
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dc.identifier.urihttp://hdl.handle.net/11455/10445-
dc.description.abstract在本論文中我們針對開發軟性顯示技術的瓶頸,提出了三項關鍵製程的開發。第一部分在塑膠基材上沉積單層氮化矽阻障膜(barrier)及聚對二甲苯/氮化矽多層氣體阻障膜,分析其阻障特性並觀察撓曲測試後薄膜受破壞的狀況。實驗中的無機膜的破壞包含了裂痕(cracks channeling)和剝離(debonding),利用電漿表面處理及聚對二甲苯的沉積來改善並抑制缺陷的產生,4 對聚對二甲苯 (600 nm)/氮化矽(100 nm) 沉積於PC後 經過三千次撓曲測試,其透水透氧特性仍然維持在機台量測的極限。第二部分在軟性薄膜電晶體製程上,以玻璃做為載板,沈積聚對二甲苯薄膜(parylene-C)於玻璃上,並在此基板上以標準的薄膜電晶體製程在250°C 溫度下製作氫化非晶矽薄膜電晶體,在製備聚對二甲苯基板上,發現可以藉由控制沉積速率及熱退火的方式,使得聚對二甲苯基板的透明性及操作溫度可以大幅提高。薄膜電晶體的特性不受聚對二甲苯薄膜基板從玻璃基板上剝離的影響,其在聚對二甲苯薄膜基板上之電晶體特性如下:開關電流比>105、臨限電壓:2.19 V、場效遷移率:0.246 cm2/V⋅s。 我們在第三部分,利用自我對準曝光技術及光阻做為電鍍模仁的方式,成功製備出超薄型光源及具電鍍銅散熱基座(heat spreader)之發光二極體。結合高反射率金屬電極將發光二極體陣列在以玻璃為承載基板的可撓性銦錫氧化物透明導電基板上,開發穩定且高壽命的固態光源。製程建立在薄膜技術以及現今半導體製程。在彎曲實驗中,測試不同彎曲半徑對光板的影響,並在撓曲半徑(1.5 cm)測試條件下,光板特性不變。另外,利用相同的製程我們在氮化鎵二極體背面電鍍出3 mm x 3 mm散熱銅基座,其表面為高反射鏡,此銅基座可以有效將整體發光二極體的熱導出,也因為熱量不在累積於內部於是提升了整體的發光效率及發光強度。量測後發現,藉由高反射鏡的散熱銅基座輔助散熱,其光輸出功率在1A下約為700 mW,與原始二極體提高約2.7倍強度。zh_TW
dc.description.abstractIn this dissertation, some key technologies in fabrication of flexible display devices have been investigated. Several novel experiment design, material application and characterization of various flexible display devices have been attempted and developed. The first part of this study focused on the effect of single layer and multi-layer structure on high-performance barrier coating. It was found that the observed fracture of barrier was governed by two distinct crack patterns: cracks channeling in the coating and debonding between the coating and substrate. The plasma pretreatment and one specific polymer layer, i.e. parylene, were chosen to suppress the formation of SiNx cracks. The parylene/SiNx/PC structure is overwhelmingly superior barrier layer than the single thin brittle SiNx/PC film. Consequently, using the optimized SiNx and parylene, a multilayer composed by 4 pairs of parylene (600 nm)/SiNx(100 nm) was deposited on the PC substrate. After 3000-times cyclic bending, the water vapor and oxygen transmission rates the four pairs of parylene/SiNx coatings on PC can be maintained at a level near 0.01 g/m2/day and 0.1cc/m2/day, respectively. In the second part, the parylene-C material was introduced as a flexible substrate for amorphous Si thin-film transistors (TFTs) via a lifoff process, where a rigid glass substrate is provided for the parylene-C coating. The deposition rate of parylene-C can be controlled by the vaporization temperature and monomer partial pressure which can improve the optical performance and crystalline form of as-deposited parylene-C film. After annealed the parylene film, it can be processed at higher process temperature. The direct fabrication of a-Si TFTs on an engineered parylene substrate using a direct separation method without any adhesive was demonstrated. Parylene was used predominantly as the substrate of the TFTs. The engineered parylene can be peeled off from the glass carrier after forming the TFT structure. The transfer characteristics of these a-Si TFTs on a parylene substrate exhibited a field effect mobility of 0.246 cm2/V-s, on/off ratio (Ion/Ioff) >105(VDS=10 V), off current (Ioff) <10-10 A, and threshold voltage of 2.19 V. This method could be applied in the fabrication of the active-matrix backplane for flexible displays using the process temperature below 250C. In the third part, a combination of self-alignment and lift-off techniques was used to design and fabricate an ultrathin flexible light plate and high thermal dissipation blue light-emitting diode (LED) on sapphire. Almost the same process flow, we developed two different LED package forms using commercial LEDs. It was found that both the EL intensity and peak position of the flexible light plate were nearly the same after the cyclic bending test (r=1.5 cm). The blue LED chip array can be sandwiched by the ITO and Al electrodes with all the processing temperatures below 250C. In view of the flexible backlight applications, the ITO-coated transparent parylene template can be peeled off from the glass carrier, after forming the ultrathin LED light plat. Finally, according to the above methods, we have also demonstrated an enhanced performance of GaN/sapphire LED embedded in a reflective copper heat spreader. The cup-shaped LED heat sink with a base dimension of 3 mm x 3 mm is electroformed on sapphire directly using the spin-coated photoresist as a mold and coated with the Au/Cr/Ag mirror, which effectively enhances the heat dissipation down to the metal frame and reaps the light flux generated from the side emission. With the aid of a reflective heat spreader, the encapsulated LED sample driven at 1 A yields the light output power of 700 mW and an around 2.7-times increase in the wall-plug efficiency compared to that of the conventional GaN/sapphire LED. Infrared thermal images confirm the GaN/sapphire LED with more efficient heat extraction and better temperature uniformity. These results exhibit an alternative solution to thermal management of high-power LED-on-sapphire samples besides the laser lift-off technique. This method could be extended to improve the thermal and optical performance of yellow or red LEDs .en_US
dc.description.tableofcontentsAcknowledgement ...................................................................................... I Abstract (in Chinese) ................................................................................. II Abstract ..................................................................................................... III Contents ..................................................................................................... V Table Captions ........................................................................................ VII Figure Captions ...................................................................................... VIII Chapter 1 Introduction .............................................................................. 1 1.1 Background of Researches on Flexible Electronics ................................. 1 1.2 Plastic Substrates for Flexible Display ..................................................... 2 1.3 Flexible TFT Development ........................................................................ 4 1.4 Flexible Electrode and Backlight Development ........................................ 5 1.5 Organization of This Dissertation .............................................................. 6 Chapter 2 Experiments and Simulation Tools ........................................ 13 2.1 Parylene Deposition ................................................................................. 13 2.1.1 Parylene History and the Gorham Method .................................... 13 2.1.2 Parylene Deposition System Design .............................................. 14 2.2 Processes Facilities .................................................................................. 15 2.3 Characterization Methods ........................................................................ 16 2.4 Simulation Tools ...................................................................................... 21 Chapter 3 Barrier Coatings on Plastic Substrates .................................. 29 3.1 Single Barrier layer on Plastic Substrate ................................................. 29 3.1.1 Effects of Plasma Pretreatment on Silicon Nitride and Plastic Substrate Adhesive Improvement.................................................. 30 3.2 SiNx/parylene Multilayer on Plastic Substrate ........................................ 32 3.2.1 Crack Study of Barrier Coating after Bending Test ....................... 32 VI 3.2.2 Protective Organic Coating to Improve the Resistance of Crack Formation ...................................................................................... 34 3.3 Summary .................................................................................................. 35 Chapter 4 Direct Fabrication of a-Si Thin-Film Transistors on an Engineered Parylene Template Using a Direct Separation Process .................................................. 51 4.1 Engineered Parylene Template Coating on Glass Substrate .................... 52 4.1.1 Physical Properities of Thick Parylene Deposited on Glass .......... 52 4.1.2 Mechanism of Parylene Direct Separation from Glass .................. 55 4.2 Fabrication of TFT on Engineered Parylene Template ............................ 55 4.3 Summary .................................................................................................. 58 Chapter 5 LED Light Source using Self-Alignment and Lift-Off Technologies..................................................... 72 5.1 An Ultrathin Flexible Light Plate ............................................................ 72 5.1.1 Physical Properties of ITO Deposited on Parylene ....................... 73 5.1.2 Self-Alignment LED Flexible Light Plate ..................................... 75 5.2 Improved Thermal Management of GaN-based LED on Sapphire Substrate via Reflective Copper Heat Spreader...................................... 78 5.2.1 Optical and Thermal Analysis of GaN/sapphire with Copper Heat Spreader ......................................................................................... 79 5.2.2 Characteristics of GaN LEDs on sapphire with Copper Heat Spreader ......................................................................................... 81 5.3 Summary .................................................................................................. 84 Chapter 6 Conclusions and Future work ................................................ 107 References ............................................................................................... 111 VITA ....................................................................................................... 120 VII ble Captions Table 4-1 Electrical properties of a-Si TFTs on glass substrate, engineered parylene/glass substrate and freestanding engineered parylene template (lift-off from glass substrate). The TFTs on the flexible engineered parylene template after bending test for 105 times is also tabulated. ..... 60 Table 5-1 Geometrical dimension of LED embedded in Cu and thermal properties of materials used in numerical analysis. ..................................................... 86 VIII gure Captions Fig.1- 1 Comparsion of plastics by glass transition temperature and crystalline structure. ...................................................................................................... 8 Fig. 1- 2 Barrier requirements for different applications. ........................................... 9 Fig. 1- 3 Schematic diagram of the TFT direct process sequence (a)bonding technique (b)laser release method. ............................................................ 10 Fig. 1- 4 Schematic diagram of the TFT transfer process sequence. ......................... 11 Fig. 1- 5 Flowchart of this dissertation. ..................................................................... 12 Fig. 2- 1 The polymerization route for parylene. ...................................................... 23 Fig. 2- 2 The structure of several different parylene repeat units. ............................. 23 Fig. 2- 3 Parylene deposition apparatus. ................................................................... 24 Fig. 2- 4 Pictures of two-point bending test facility. ................................................. 25 Fig. 2- 5 Schematic of MOCON vapor permeation rate test machine (a) H2O (b) O2. ................................................................................................................... 26 Fig. 2- 6 Experimental setup of calcium test used in this work. ............................... 27 Fig.2- 7 (a) the correlation between junction temperature and junction forward voltage (b)current and voltage waveforms for test. .................................. 28 Fig. 3- 1 WVTR and OTR values of PECVD (a) SiOx and (b) SiNx film on PC substrates as functions of film thickness. .................................................. 37 Fig. 3- 2 Contact angle (a) and surface free energy (b) of PC substrates treated by different gases as a function of time. ........................................................ 38 Fig. 3- 3 Contact angle measurements results: (a) untreated PC, (b) 60-s Ar, (c)60-s N2, and (d) 60-s O2 plasma-treated PC. .................................................... 39 Fig. 3- 4 Adhesion of PC substrates treated by different gases as a function of time. ................................................................................................................... 40 IX Fig. 3- 5 Roughness of PC substrates treated by different gases as a function of time. ................................................................................................................... 41 Fig. 3- 6 AFM surface morphologies of (a) untreated, (b) 60-s N2, (c) 60-s N2, and (d)60-s O2 plasma-treated PC substrates. .................................................. 42 Fig. 3- 7 WVTR and OTR data of SiNx film on (a) Ar, (b) N2, and(c) O2 plasma-treated PC bended for 6000 times. ............................................... 43 Fig. 3- 8 (a) Scanning electron micrograph of channeling cracks propagate laterally in SiNx/PC sample, and (b) scanning confocal microscopy of SiNx barrier film debonding along barrier/substrate interface. ..................................... 44 Fig. 3- 9 Moisture and oxygen permeation rates as functions of cyclic bending times for SiNx/PC samples with various barrier thicknesses (50-400 nm). ........ 45 Fig. 3- 10 Surface roughness of (a) untreated and (b) Ar ICP plasma-treated SiNx films measured by atomic force microscopy. ........................................... 46 Fig. 3- 11 Adhesion tape-pull test for 600 nm-thick parylene films deposited on (a) untreated and (b) Ar ICP plasma-treated SiNx/PC samples. ..................... 47 Fig. 3- 12 Moisture and oxygen permeation rates as functions of cyclic bending times for parylene/SiNx/PC structure. ....................................................... 48 Fig. 3- 13 Moisture and oxygen permeation rates as functions of cyclic bending times for two pairs of parylene/SiNx coatings on PC substrate. ............... 49 Fig. 3- 14 Cross-section SEM of 4 pairs parylene/SiNx on PC substrate .................. 50 Fig. 4- 1 The transmittance of parylene-C films on various vaporization temperature. ................................................................................................................... 61 Fig. 4- 2 The transmittance of parylene-C films on various reservoir surface open area. ........................................................................................................... 62 Fig. 4- 3 The XRD of as-deposited parylene-C on various reservoir surface area. .. 63 Fig. 4- 4 The XRD of as-deposited parylene-C on various reservoir surface area. .. 63 X Fig. 4- 5 AFM images of as-deposited parylene-C and different temperature annealing samples. .................................................................................... 64 Fig. 4- 6 Thermomechanical analysis of as-deposited 25μ m parylene and 250 °C annealed parylene. ..................................................................................... 65 Fig. 4- 7 The change of parylene crystallite on the simulation of high temperature TFT (220 °C) processes with lower thermal annealing temperature (200 °C) parylene-C. ......................................................................................... 66 Fig. 4- 8 The change of parylene crystallite on the simulation of high temperature TFT (220 °C) processes with higher thermal annealing temperature (250 °C) parylene-C. ......................................................................................... 66 Fig. 4- 9 Cracked parylene after 300 °C annealing ................................................... 67 Fig. 4-10 Process flowchart of flexible a-Si TFTs fabrication on an engineered parylene/SiNx/parylene template. ............................................................. 68 Fig. 4- 11 WVTR and OTR permeation data of four kinds of templates: PC substrate, parylene(7.5 μm)/PC, SiNx(100 nm)/parylene(7.5 μm)/PC, and parylene(200 nm)/ SiNx(100 nm)/parylene(7.5 μm)/PC. .......................... 69 Fig. 4- 12 (a) Drain current versus gate voltage characteristics of a-Si TFTs on a glass substrate, SiNx(100 nm)/parylene(7.5 μm)/glass and flexible engineered parylene template (lift-off from the glass carrier). Gate leakage current data are also depicted in this figure.(b) Drain current versus drain voltage characteristics of a-Si TFTs on a flexible engineered parylene template (lift-off from the glass carrier) under various gate voltage (VG=0-10 V) .............................................................................................. 70 Fig.4-13 Photograph of a demonstration of a-Si TFTs on an engineered parylene/SiNx/parylene template which attached to a PC substrate. ........ 71 Fig. 5- 1 Fabrication procedures of ITO coated on a parylen substrate. ................... 87 Fig. 5-2 Optical transmittance and electrical resistivity as a function of ITO deposition substrate temperature. .............................................................. 88 XI Fig. 5- 3 Transmittance of ITO films under different substrate temperature. ........... 89 Fig. 5- 4 XRD patterns of ITO films under different substrate temperature. ............ 90 Fig. 5-5 FE-SEM surface morphologies for ITO films under different substrate temperature growth (a) 150 °C (b) 170 °C (c) 190 °C (d)210 °C (e)230 °C (f)250 °C. .................................................................................................. 91 Fig. 5- 6 SEM cross image of ITO/SiNx/parylene. ................................................... 92 Fig. 5- 7 Optical image of buckling cracks in ITO films. ......................................... 92 Fig. 5- 8 Design and fabrication steps of an ultra thin flexible light plate on a parylene template using a combination of self-alignment and lift-off techniques. ................................................................................................ 93 Fig. 5- 9 Step coverage of LED bare chip planarized by negative photoresist examined by scanning electron microscopy: Effects of various exposure conditions (a) normal (b) 125 % higher (b) 150 % higher dosage were demonstrated. ............................................................................................ 94 Fig. 5- 10 Photograph of ultra thin light plate attached to a plastic sheet. Each InGaN LED chip is driven at 20 mA. ................................................................... 95 Fig. 5- 11 (a) Dependence of normalized ITO resistance change on the bending curvature and encapsulation layer thickness (b) Electroluminescence spectra taken from flexible light plate: as fabricated and after 1000 times cyclic bending test by a 1.5, 1 and 0.8cm radius cylinder. Each InGaN LED chip is driven at 20 mA. The inset figure shows the series resistance. ................................................................................................................... 96 Fig. 5-12 Schematic illustration of the high power GaN LED package: (a)conventional (b) LED with lateral thermal spreader. ........................... 97 Fig. 5- 13 Established 3-D model for optical simulation: (a)conventional (b) LED with lateral thermal spreader. .................................................................... 98 Fig. 5- 14 Output power simulated by ray tracing for different electroplated XII configurations: (a) embedded depth (b) micro-reflector. .......................... 99 Fig. 5- 15 Established 3-D finite element model for heat simulation: (a)conventional (b) LED with lateral thermal spreader. ................................................... 100 Fig. 5- 16 Temperature contour of LED bonded on heat sink (a)conventional (b) LED with lateral thermal spreader. ......................................................... 101 Fig. 5- 17 Simulation results of the lowest temperature on different square size and thickness (a) 4 mm2 (b) 9 mm2 (c) 36 mm2 (d) 81 mm2 thermal spreader. ................................................................................................................. 102 Fig. 5- 18 Schematical fabrication sequences of the LED device structure with a reflective Cu heat spreading layer (a) conventional lateral-electrodes LED, (b) a transferring of the chip to the glass carrier, followed by the PR coating, (c) an evaporation of Au/Cr/Ag metal system, (d) Cu electroplating over a cup-shaped reflector, (e) a LED chip embedded into the reflective Cu heat spreader after a removal of the carrier and the PR by immersion of acetone. ............................................................................. 103 Fig. 5- 19 SEM micrographs of fabrication sequences of InGaN LED structure embedded in a reflective Cu heat spreader: (a) process step show in Fig. 5-17(b) and (b) final process step shown in Fig. 5-17(e). ....................... 104 Fig. 5- 20 (a) Llight output power and (b) power efficiency of LED with the reflective Cu heat spreader as a function of the forward current, along with the case of the conventional GaN LED. The inset shows their corresponding angular distribution of emission patterns at 20 mA. ....... 105 Fig. 5- 21 Thermal images for InGaN/sapphire LED without (a) and with (b) a reflective heat spreader, as well as the simulated thermal distribution for (c) the former and (d) the latter, respectively. ......................................... 106zh_TW
dc.language.isoen_USzh_TW
dc.publisher材料科學與工程學系所zh_TW
dc.relation.urihttp://www.airitilibrary.com/Publication/alDetailedMesh1?DocID=U0005-0708200719592000en_US
dc.subjectflexible thin-film transistorsen_US
dc.subject軟性薄膜電晶體zh_TW
dc.subjectbarrier layeren_US
dc.subjectflexible light plateen_US
dc.subjectlight-emitting diodeen_US
dc.subjectthermal dissipationen_US
dc.subject阻障層zh_TW
dc.subject軟性光板zh_TW
dc.subject發光二極體zh_TW
dc.subject散熱zh_TW
dc.title軟性顯示元件關鍵製程技術之開發研究zh_TW
dc.titleDevelopment of Key Technologies in Fabrication of Flexible Display Devicesen_US
dc.typeThesis and Dissertationzh_TW
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