Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/10617
標題: 半色調光罩之微影製程參數對薄膜電晶體通道光阻橫截面形貌與厚度之影響
Effects of photolithography process parameters of the half-tone mask on cross-sectional morphologies and thicknesses of the channel photoresist of thin film transistors
作者: 吳如琳
Wu, Ju-Lin
關鍵字: thin film transistor
薄膜電晶體
half-tone mask
photolithography
channel photoresist thickness
exposure
半色調光罩
微影
通道光阻膜厚
曝光
出版社: 材料科學與工程學系所
引用: 参考文獻 [1] 賴佳宏,薄膜電晶體液晶顯示器產業之技術發展趨勢研究-中原大學企業管理學系碩士論文,2003.07 [2] 趙中興,顯示器原理與技術,全華科技,2000,p.11-21 [3] 魏永康,台灣TFT-LCD產業之競爭策略分析-臺北大學企業管理學系碩士論文,2004.08 [4] 徐自佑、吳佩玲,LCD產業簡介,產業評析,台北科技大學EMBA,2008.04 [5] P. G. LeComber and W. E. Spear, “Electronic Transport in Amorphous Silicon Films,” Phys. Rev. Lett., 25, 1970, p.509 [6] W. E. Spear, R. J. Loveland and A. Al-Sharbaty, J. Non-Cryst. Solids, 15, 1974, p.410 [7] P. G. LeComber, W. E. Spear and A. Ghaith, “Amorphous silicon field-effect device and possible application”, Electronic Letters, 15, 1979, p.179-181 [8] 紀國鐘、鄭晃忠,液晶顯示器技術手冊,台灣電子材料與元件協會,2002 [9] 趙中興,顯示器原理與技術,全華科技,2000,p.11-21 [10] Jean. H. Song, D. J. Kwon, S. G. Kim, N. S. Roh, H. S. Park, Y. B Park, D. G. Kim, C. O. Jeong, H. S Kong, C. W. Kim, and K. H. Chung, ”Advanced Four-Mask Process Architecture for the a-Si TFT Array Manufacturing Method”, SID 02 DIGEST,34.1,2002,p.1038- 1041 [11] C. W Kim, Y. B. Park, H. S. Kong, D. G. Kim, S. J. Kang, J. W. Jang, and S. S. Kim, ”A Novel Four-Mask-Count Process Architecture for TFT-LCDs”, SID 00 DIGEST,42.1,2000,p.1006-1009 [12] L. Eckertova, and T. Ruzicka, “Diagnostics and Applications of Thin Films”, Ch.1 & 2, Institute of Physics Publishing, 1993 [13] J. L. Vossen and W. Kern, “Thin Film Processes”, Academic Press ,New York, 1978 [14] R. A. Levy, “Microelectronic Materials and Process”, Ch.4, Kluwer Academic, 1986 [15] S. Wolf, “Silicon Process for the VLSI Era”, Ch.10, Lattice Press, 1986 [16] B. Prince and G. Due-Gunderson, “Semiconductor. Memories”, John Wiley & Sons, 1983 [17] M. Bowden and L. Thompson, “Introduction to Microlithography”, American Chemical Society , 1983 [18] R. Dammel, “Diazonaphthoquinone-Based Resists”, SPIE Turtorial Text, SPIE Optical Engineering Press, 1993 [19] E.C Douglas, “Solid State Technology”, 24, 1981, p.65 [20] S. Wolf, “Silicon Processing for the VLSI Era”, 1, Ch.15, Lattice Press, 1986 [21] 莊達人,VLSI製造技術,高立圖書有限公司,2001 [22] J. S. Judge, “Etching for Pattern Definition”, Electrochmeical Society, Londa, 1976, p.19 [23] J. L. Vossen and W. Kern, “Thin Film Processes”, Academic Press, New York, 1978 [24] 龍柏華、何孝恆,乾蝕刻製程暨機台原理簡介,光電科技工業協進會, PIDA,2004.9.53期,p37 [25] P. J. Revell and G. F. Goldspink, "A review of reactive ion beam etching for production", 34, 1984, p.455 [26] D. J. Elliott, “Integrated Circuit Fabrication Technology”, 2nd Ed., McGraw Hill, 1989 [27] 謝漢萍,灰階光罩於微型光學元件之應用,國立交通大學顯示科技研究所,p.4 (http://osdlab.eic.nctu.edu.tw/osdlab/chinese/DOWNLOAD/download.htm) [28] 謝詠芬、何快容,微電子材料與製程,中國材料科學學會網路輔助教學課程,第十一章 材料分析技術在積體電路製程中的應用 (http://pilot.mse.nthu.edu.tw/micro/) [29] R.A Young, and R.V. Kalin, “Scanning Electron Microscopic Techniques for Characterization of Semiconductor Materials”, American Chemical Soc., Sypm. Series 295, Washington, DC, 1986 [30] J. I. Goldstein, D. E. Newbury, P. Echlin, D. C. Joy, C. Fiori, and E. Lifshin, “Scanning Electron Microscope and X-ray Microanalysis”, Plenum, New York, 1984 [31] 陳力俊,材料電子顯微鏡學,行政院國家科學委員會精密儀器發展中心,2004 [32] Y. L. Wang and Z. Shao, “Design Principles of an Optimized Focused Ion Beam System”, a chapter in Advances in Electronics and Electron Physics, Academic Press ,1991. [33] R. Levi-Setti, J. M. Chabala, Y. L. Wang, P. Hallegot, and C. Girod-Hallegot, “Analytical Imaging with a Scanning Ion Microprobe”, a chapter in Images of Materials, 94-113, Oxford:Oxford University
摘要: TFT-LCD產業之Array工程大都使用五道光罩製程,包含閘極電極(GE)、半導體層電極(SE)、源極/汲極電極(SD)、接觸孔洞(CH)及畫素電極(PE)。本論文是利用半色調光罩技術,將半導體電極(SE)及源極/汲極電極(SD)整合為一道光罩,成為四道光罩製程。在SE/SD層之微影製程步驟中探討不同的製程條件對薄膜電晶體通道光阻橫截面形貌及膜厚的影響。經由比較A光阻及B光阻之特性,本實驗將採用B光阻作為光阻材料。由A光罩及B光罩之實驗結果,可知35%透過率的C光罩與50~54mj/cm2的曝光量為最佳之製程條件,此時可得到薄膜電晶體之理想通道光阻膜厚及最佳曝光之狀態。經比較四道與五道光罩製程所完成之薄膜電晶體元件的電流-電壓曲線後,發現兩者之結果並無明顯差異,故本實驗可製作出具相同信賴性的薄膜電晶體元件。
Most of the TFT-LCD industries use five masks process, including gate electrode(GE), semiconductor electrode(SE), source/drain electrodes (SD), contact holes(CH), and pixel electrode(PE), in array procedure. This study utilizes the half tone mask technology, that could integrate the semiconductor electrode (SE) and source/drain electrodes (SD) to form one mask process, called four masks process. The effects of different process conditions on cross-sectional morphologies and thicknesses of the channel photoresist of thin film transistors in the SE/SD photolithography process step are investigated. Compared the properties between photoresist A and B, the photoresist B is used in the work. Based on the experimental results of masks A and B, one obtains that the mask C with 35% transmittance and the exposure dose within 50~54mj/cm2 are the optimum parameters. In this case, we get the suitable channel photoresist thickness of thin film transistors and the best just-exposure state. I-V curves of four masks process and five masks process show the similar performance. In conclusion, four masks process can fabricate thin film transistors with high reliability.
URI: http://hdl.handle.net/11455/10617
Appears in Collections:材料科學與工程學系

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