Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/37693
標題: Test data compression for minimum test application time
作者: Tsai, P.C.
王行健
Wang, S.J.
Lin, C.H.
關鍵字: test data compression
decompression architecture
SOC
testing
forced
bit-inversion
intellectual property
期刊/報告no:: Journal of Information Science and Engineering, Volume 23, Issue 6, Page(s) 1901-1909.
摘要: In this paper, we proposed a test data compression scheme targeted for minimizing the amount of test data. The proposed scheme can reduce the test application time and minimize the amount of compressed test data, which reduces the size of data memory in ATE and the time needed to transfer test data. A decoder design is also presented. Experimental results on ISCAS benchmark circuits show that the compressed data produced by our method are much smaller than previous methods.
URI: http://hdl.handle.net/11455/37693
ISSN: 1016-2364
Appears in Collections:資訊科學與工程學系所

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