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|標題:||Injection-locked clock recovery using a multiplexed oscillator for half-rate data-recovered applications|
|期刊/報告no：:||Ieice Transactions on Fundamentals of Electronics Communications and Computer Sciences, Volume E91A, Issue 1, Page(s) 409-412.|
|摘要:||An injection-locked clock recovery circuit (CRC) with quadrature outputs based on multiplexed oscillator is presented. The CRC can operate at a half-rate speed to provide an adequate locking range with reasonable jitter and power consumption because both clock edges sample the data waveforms. Implemented by 0.18-mu m CMOS technique, experimental results demonstrate that it can achieve the phase noise of the recovered clock about -121.55 dBc/Hz at 100-kHz offset and -129.58 dBc/Hz at 1-MMz offset with +/- 25 MHz lock range, while operating at the input data rate of 1.55 Gb/s.|
|Appears in Collections:||電機工程學系所|
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