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標題: 應用於無線區域網路802.11b/g與60GHz之壓控振盪器電路設計
The Voltage Controlled Oscillator Circuit Design for 802.11 b/g WLAN and 60GHz Applications
作者: 陳妍潔
Chen, Yen-Chieh
關鍵字: voltage controlled oscillator
cross couple pair
出版社: 電機工程學系所
引用: [1] Behzad. Razavi, “Design of Analog CMOS Integrated Circuits,” McGRAW-Hill, 2001. [2] Jong-Phil Hong and Sang-Gug Lee, “Low phase noise Gm-boosted differential gate-to-source feedback Colpitts CMOS VCO,” IEEE J. Solid-State Circuits, vol. 44, no. 11, pp. 3079-3091, Nov. 2009. [3] 王銓慶,應用於MB-OFDM Mode-1 UWB 接收機之CMOS壓控振盪器與頻率合成器的研製,國立成功大學電腦與通信工程研究所碩士論文,民國九十六年。 [4] Matthew cross and Darrin J.Young, “CMOS cross-coupled VCO architecture comparison at 2GHz and 16GHz,” International Conference on Solid-State and Integrated Circuit Technology, pp. 1601-1604, 2008. [5] Emad Hegazi, Jacob Rael, and Asad A. Abidi, “The Designer’s Guide to High-Purity Oscillators,” Kluwer Academic publishers. [6] Lin Jia, Jian-Guo Ma, Kiat Seng Yeo, and Manh Anh Do, “9.3-10.4-GHz-band cross-coupled complementary oscillator with low phase-noise performance,” IEEE Transactions on Microwave Theory and Techniques, vol. 52, no. 4, pp. 1273-1278, 2004. [7] Emad Hegazi, Henrik Sjoland, and Asad A. Abidi, “A filtering technig to lower LC oscillator phase noise,” IEEE J. Solid-State Circuits, vol. 36, no. 12, pp. 1921-1930, 2001. [8] Hsieh-Hung Hsieh and Liang-Hung Lu, “A 63-GHz voltage-controlled oscillator in 0.18 CMOS,” IEEE Symposium on VLSI Circuits, pp. 178-179, 2007. [9] Jing-Hong Conan Zhan, Jon S. Duster, and Kevin T.Kornegay, “A 25-GHz emitter degenerated LC VCO,” IEEE J. Solid-State Circuits, vol. 39, no. 11, pp. 2062-2064, 2004. [10] 吳明峰,本地震盪信號原產生電路設計,國立中興大學電機工程學系碩士論文,民國九十八年。 [11] 郭文福,應用於超寬頻無線網路之壓控振盪器設計,國立中興大學電機工程學系碩士論文,民國九十七年。 [12] 柯柏丞,應用於雙頻帶系統之本地震盪訊號源電路設計,國立中興大學電機工程學系碩士論文,民國九十九年。 [13] Behzad. Razavi, “ RF Microelectronics,” Prentice- Hall, 1998. [14] Thomas H. Lee, “The design of CMOS radio-frequency integrated circuits,” CAMBRIDGE, 2004. [15] Andrea Lacaita, Salvatore Levantion, and Carlo Samori, “Interated Frequency Synthesizers for Wirless Systems,” CAMBRIDGE, 2007. [16] P. Andreani, X. Wang, L. Vandy, and A. Frad, “A study of phase noise in Colpitts and LC-tank CMOS oscillators,” IEEE J. Solid-State Circuits, vol. 40, no. 5, pp. 1107-1118, May. 2005. [17] Emad Hegazi and Asad A. Abidi, “Varactor characteristics, oscillator tuningcurves, and AM-FM conversion,” IEEE J. of Solid-State Circuits, vol. 38, no. 6, pp. 1033-1039, Jun. 2003. [18] Nabil Boughanmi, Dalenda Ben Issa, Abdennaceur Kachouri, and Mounir Samet, “High Q-VCO with Low phase noise for communications applicarions,” International Conference on Design and Test of Integrated System in Nanoscale Technology, pp. 370-373, 2006. [19] Lin Jia, Jian-Guo Ma, Kiat Seng Yeo, and Manh Anh Do, “9.3-10.4-GHz-band cross-coupled complementary oscillator with low phase-noise performance,” IEEE Transactions on Microwave Theory and Techniques, vol. 52, no. 4, pp. 1273-1278, 2004. [20] A. Jannesari and M. Kamarei, “ Design of a low voltage low phase noise complementary CMOS VCO,” International Symposium on Integrated Circuit, pp. 426-429, 2007. [21] Markus Tormanen and Henrik Sjoland, “A 25GHz differential LC VCO in 90-nm CMOS,” IEEE Asia Pacific Conference on Circuits and Systems, pp. 554-557, 2008. [22] 微帶線基本架構介, 百度百科, [23] Alex Katz, Ofir Degani, and Eran Socher, “Design and optimization of a low-noise cross coupled fndamental VCO in 90nm CMOS for 60GHz appcations,” IEEE 11 th Topical Meeting on SIRF, pp. 13-16 2001. [24] Choong-Yul Cha and Sang-Gug Lee, “A complementary Colpitts oscillator in CMOS technology,” IEEE Transactions on Microwave Theory and Techniques, vol. 53, no. 3, pp. 881-887. [25] H. Feng, Q. Wu, X. Guan, R. Zhan and A. Wang, “2.45GHz wide tuning range VCO using MOS varactor in 0.35 SiGe BiCMOS technology,” IEEE International Symposium on MAPE, vol. 1, pp. 10-13 [26] Yayue Dai, Jinfang Zhou, Boyu Nie, and Kangsheng Chen, “A 60GHz voltage-controlled oscillator with a 3.6GHz tuning range in 180nm CMOS technology,” Asia Pacific conference on Postqraduats Reaserch in Microeletronics & Electronic, 2009, PrimeAsia 2009, pp. 93-96, 2009. [27] Pietro Andreani and Ali Fard, “A 2.3GHz LC-tank CMOS VCO with optimal phase noise performance,” International Solid-State Circuits Conference, pp. 691-700, 2006. [28] Ming Da Tsai, Yi-Hsien Cho, and Huei Wang, “A 5-GHz low phase noise differential Colpitts CMOS VCO,” IEEE Microwave and Wireless Components Letter5, vol.15 pp. 327-329. [29] Ren-Chien Liu, Hong-Yeh Chang, Chi-Hsueh Wang, and Huei Wang, “A 63GHz VCO using a standard 0.25 ,” International Solid-State Circuits Conference, vol. 1, pp. 446-447, 2004. [30] Dongkyu Park and Byunghoo Jung, “Low power LC-VCO design using direct cross-coupled cell biasing,” IEEE International Symposium on circuits and systems, pp. 4018-4021. 2006. [31] IEEE 802.11通訊協定技術簡介,維基百科, [32] 王胤晴,毫米波頻段共平面波導微波電路與積體電路之設計,國立中央大學通訊工程研究所碩士論文,民國九十二年。
摘要: 本論文主要是討論射頻系統中的子電路壓控振盪器,分別操作在不同的頻率和使用不同的製程。每一個設計的電路均說明其個別的電路架構及原理,並且討論模擬與量測的結果。 第二章的內容是考畢茲差動壓控振盪器電路設計,在設計上是使用轉導提升電晶體來增加它的轉導值,以達到降低起振電流的作用,並且利用回授電容的分壓使輸出振幅增加。量測到的震盪頻率為2.66GHz至2.72GHz,在頻率偏移1MHz處之相位雜訊為-113dBc/Hz。 第三章為互補式低功耗壓控振盪器設計。利用互補式的架構可以增加轉導值,使電晶體開關切換速度增加並且降低功率消耗。使用雜訊濾除的技巧將尾電流源的二倍頻濾掉。量測到的震盪頻率為2.12GHz至2.74GHz,在頻率偏移1MHz處之相位雜訊為-102dBc/Hz,功率消耗為11.84mW。 第四章是設計60GHz的壓控振盪器,主要是使用傳輸線來設計,傳輸線的部分是使用微帶線。利用外加的交叉耦合對電晶體和傳輸線來增加轉導值並且選取適當的長度使電路達到最佳的特性。另外也使用的源極退化電容的技巧讓振盪頻率和可調頻率範圍增加,在模擬的中心頻率為61.23GHz,在頻率偏移1MHz處之相位雜訊是-96dBc/Hz,可調頻率範圍是59.9GHz-62.36GHz。
In this thesis, design of the voltage controlled oscillator (VCO) in radio frequency system is presented. The circuits discussed in this thesis are design to operate at different frequencies and they are implemented by using different process technologies. For individual circuit, we describe its structure and principles, and finally discuss the results of simulation and measurement. In Chapter two, a Colpitts differential VCO circuit is designed, in which, the gm-boosting transistors are used to increase the value of its transconductance and to reduce the required start-up current. The feedback capacitor divider can also increase the output amplitude and improve the performance. The measured oscillation frequencies are from 2.66GHz to 2.72GHz, and the measured phase noise is -113dBc/Hz @ 1MHz frequency offset. In Chapter three, we present a complementary low power VCO circuit design. The complementary structure can increase the value of transconductance, thus it can increase transistor switching speed and reduce the power consumption. Furthermore, the second harmonic of the tail current source is filtered out by using the noise filter technique. The measured oscillation frequencies are from 2.12GHz to 2.74GHz, and the measured phase noise is -102dBc/Hz @ 1MHz frequency offset. The measured power consumption is 11.84mW. The content of Chapter four is a 60GHz VCO which is mainly designed by using microstrip lines. The use of addition cross couple pair and transmission lines increase the transconductance, and the microstrip lines need to be selected as appropriate length to achieve the best performance. In addition, we also used the source degenerated capacitance technique to increase the oscillation frequency and the tuning range. The simulated center oscillation frequency is 61.23GHz, and the phase noise is -96dBc/Hz @ 1MHz frequency offset. The tuning range is 59.9GHz-62.36GHz.
其他識別: U0005-1608201116360300
Appears in Collections:電機工程學系所



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