Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/7342
標題: HIPERMAN 系統基頻接收機之FPGA 實現
FPGA Implementation of Baseband Receiver for HIPERMAN System
作者: 王翰智
Wang, Hang-Chih
關鍵字: HiperMAN
高性能的都市無線網路
FPGA
ETSI
OFDM
Viterbi
可規劃之邏輯陣列
歐洲電信標準協會
正交分頻多工
腓特比
出版社: 電機工程學系所
引用: [1] ETSI, "Broadband Radio Access Networks(BRAN) HiperMAN Physical layer", ETSI TS 102 117 V.1.2.2, NOVEMBER 2004. [2] Samir Palnitkar, "Verilog HDL", Prentice Hall ,2003. [3] Xilinx Web URL: http://www.xilinx.com/ [4] Opencores Web URL: http://www.opencores.org/ [5] Alan V. Oppenheim, "Discrete-Time Signal Processing", Prentice Hall ,1999. [6] Bernard Sklar, "Digital Communications: Fundamentals and Applications", Prentice Hall , 2001. [7] John G. Proakis, "Contemporary Communication Systems Using MATLAB", Brooks/Cole. [8] Y.J Su, "Equalizer Design for HiperMAN Wireless Network", NCHU, Master Thesis, 2006. [9] J.W.Cooley and J.W.Turkey, "An Algorithm for Machine Compution of Complex Fourier Series", Math Computation, Vol. 19, pp.297-301, Apr. 1965. [10] Roshano Roberts, "Choice of Interleavers for Space-Diversity Codes in ETSI-HiperMAN and IEEE 802.16a Broadband Wireless Systems", Research Excellence Awards Competition 2004 [11] Koffman and Roman, "Broadband Wireless Access Solutions Based on OFDM Access in IEEE 802.16", IEEE communications Magazine, April 2002. [12] David Haccoun and Gay Begin, "High-Rate Puntured Convolutional Codes for Viterbi and Sequential Decoding", IEEE transations on communications. vol. 37. no. 11, November 1989. [13] Y.C. Chen, "A Double-Rate Pipelined Fast Fourier Transform Architecture for OFDM Systems", NCHU, Master Thesis, 2004. [14] R.L Jheng, "Comparison and FPGA Implementation of Signal/Double Rate Pipelined FFT/IFFT Architecture", NCHU, Master Thesis, 2005. [15] N.Weste, D. J. Skellern, "VLSI for OFDM", IEEE Communications Magazine, vol. 36. no. 10. pp. 127-131.Oct. 1998. [16] S.C Jheng, "An Integrated Circuit Design of Digital Receiving Front End of the Digital Video Broadcasting over Terrestrial (DVB-T)", NSYSU, Master Thesis, 2005. [17] C.M Chung, "Area-Efficient FPGA Implementation of Radix-4 Pipelined Fast Fourier Transform Processor", TTU, Master Thesis, 2004. [18] K.L Chen, "FFT Processor Design for OFDMSystems", NCTU,Master Thesis, 2004. [19] A.J Viterbi, "Error Bounds for Convolutional Codes and An Asymptotically Optimum Decoding Algorithm", IEEE Trans. Inform. Theory, vol. IT-13. no. 2. pp. 260-269. Apr. 1967. [20] A.J Viterbi, "Convolutional Codes and Their Performance in Communication Systems", IEEETrans. CommunicationTechnology, vol. COM-19, pp. 751-772. Oct. 1971. [21] G.D.Jr Forney, "The Viterbi Algorithm", Proc. IEEE , vol. 61. pp. 268-278. Mar. 1973. [22] G.C Li, "Implementation of A Viterbi Decoder for WLAN Receiver", NCHU, Master Thesis, 2005. [23] P.S Huang, "Design and Implementation of A Reconfigurable Viterbi Decoder", NCU, Master Thesis, 2001. [24] C.M Liou, "Design and Implementation of a Low Complexity WLAN Viterbi Decoder", NCTU, Master Thesis, 2004. [25] J.W Jhang, "System Prototyping of the IEEE 802.11a Wireless LAN Physical Layer Baseband Transceiver", NSYSU, Master Thesis, 2004. [26] Y.Y Chen, "FPGA Realization of A MIMO-OFDM System with Optimized Hardware Resource Utilization", NCTU, Master Thesis, 2006
摘要: 高性能的都市無線網路架構是由歐洲電信標準協會所制定,此網路架構的的主要的工作頻率是在2-11GHz。在高效率的都市無線網路中,它包含了通道調變,調變和正交分頻多工這三個部份。在我們的專題中,我們將使用硬體描述語言去實現它,並將已經建構好的物件燒錄到Vertex-4的FPGA開發板上。我們將使用Matlab去產生一組經過高斯白雜訊的傳送資料,我們再用開發板去驗證這組訊號,並證明演算法是正確無誤的。
HiperMAN (High Performance Radio Metropolitan Area Network) is a standard created by ETSI (European Telecommunications Standards Institute) BRAN (Broadband Radio Access Networks) group to provide inter-operable broadband fixed wireless communication access in the 2 - 11GHz radio frequency bands across Europe. In HiperMAN system, it is composed of three parts, including channel coding, modulation and orthogonal frequency division multiplexing (OFDM) system. The objectives of this project is model and implement the ETSI HiperMAN physical layer using verilog code. The result model will download to xlinix Vertex-4 FPGA development board. In the proposed project, we can create signal by MATLAB, the data passed by Gaussian channel, to our development board and we will prove the system which is implemented in FPGA board real work.
URI: http://hdl.handle.net/11455/7342
其他識別: U0005-0407200720225900
文章連結: http://www.airitilibrary.com/Publication/alDetailedMesh1?DocID=U0005-0407200720225900
Appears in Collections:電機工程學系所

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