Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/7401
標題: 低功率能量回收式互補電晶體傳輸邏輯
Low Power Energy Recovery Complementary
作者: 洪柏鍾
Hung, Po-Chung
關鍵字: adiabatic logic
絕熱式邏輯
energy recovery
low power
能量回收
低功率
出版社: 電機工程學系
摘要: 由於可攜式電子裝備的需求量與其所要求的效能,包括運算能力與使用時間,不斷地提升;低功率便成為在積體電路設計領域的重要理念。絕熱式邏輯電路(或稱為能量回收式電路)為一種降低功率消耗的設計方式。其使用絕熱式充放電的方式可以突破傳統互補式金屬氧化半導體(CMOS)操作方式,有CV2能量消耗產生的障礙。絕熱式電路所消耗的能量可分為兩種:絕熱能耗與非絕熱能耗。絕熱能耗在絕熱式邏輯中是不能消除的。但一般絕熱式邏輯都只能降低一部份非絕熱能耗。本論文分析產生非絕熱能耗的原因,且提出四種使用提升電壓及電荷回收利用技術的絕熱式電路。經由模擬一個八位元進位前瞻加法器可得知我們所提出的能量回收式互補傳輸邏輯(ERCPL)可比傳統CMOS電路減少84.4%的功率消耗。
Due to the increasing demand of portable equipments and their capability, including computational power and reliability, reducing power consumption has become an important aspect in the field of integrated circuits design. Adiabatic logic (or so called energy recovery logic) is a design style to reduce power consumption. The rule of adiabatic switching can circumvent the CV2 barrier of dissipated energy which is generated by operating CMOS circuits in a conventional way. The energy dissipated in adiabatic circuits can be distinguished into two kinds: adiabatic loss and non-adiabatic loss. An adiabatic circuit can't avoid adiabatic loss. But adiabatic logics usually can only reduce part of non-adiabatic loss. This thesis explains the reason of existence of adiabatic loss, and proposes four kinds of new adiabatic logics which use bootstrapping and charge recycling techniques. Simulation results of an 8-bit carry look-ahead adder show that the Energy Recovery Complementary Pass-transistor Logic we proposed can saves 84.4% power dissipation compared to conventional CMOS dissipation.
URI: http://hdl.handle.net/11455/7401
Appears in Collections:電機工程學系所

文件中的檔案:

取得全文請前往華藝線上圖書館



Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.