Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/8573
標題: 俱備減壓架構之90奈米壓控振盪器
Design and Implementation of 90-nm Voltage Control Oscillator with Stress Relieved Topology
作者: 洪宗揚
Hung, Tsung-Yang
關鍵字: VCO
壓控振盪器
phase noise
reliability
相位雜訊
可靠度
出版社: 電機工程學系所
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摘要: 本論文論述低電壓LC壓控振盪器的理論和實現。首先,介紹壓控振盪器的基本原理和振盪器的分類以及電路的演進。接著,引述線性非時變相位雜訊分析模型作為分析頻域物理特性與元件特性對相位雜訊的巨觀解釋模型,依模型作為在低電壓限制下 電路優化的方向。並引述線性時變相位雜訊分析模型作為電路電性分析時域波型對相位雜訊的微觀模型,以至於為何電源及偏壓電路的雜訊會惡化相位雜訊,並對提升低電壓振盪器的訊號雜訊比及偏壓電路的雜訊隔離的方法之間做分析討論。 第三章,考慮先進製程低壓元件薄氧化層低耐壓特性及元件安全可靠操作區間 調整VCO設計結構使兼具高振幅與高可靠度,並針對5GHz 射頻之頻段,我們使用90nm CMOS製程來實現本論文中2個VCO電路。第一個電路採用薄氧化絕緣層電晶體,頻率5.5GHz結合相位雜訊降低設計技術與減輕超壓效應架構, 第二個採用厚氧化絕緣層電晶體電路為頻率5.5GHz結合相位雜訊降低設計技術與減輕超壓效應架構。 最後透過量測比較這兩種LC壓控振盪器相位雜訊特性及差異 作結論探討作為日後先進製程低壓元件單晶片射頻系統晶片關建參數設計參考。
In this thesis, the theory and implementation of LC Voltage Control Oscillator (VCOs) with stress relieved topology are studied. Firstly, a brief introduction on oscillator theory and class is described. Secondly, two behavior models are proposed to analyze the phase noise, these models explain the thermal and flicker noise contributing to the phase noise of the VCO. Based on previous knowledge of phase noise theory and over stress concerns on low voltage thin oxide device using VCO circuit, a new VCO is redesign in bias circuit to compromise both phase noise and reliability robust performances. Hence, a 90-nm CMOS technology is adopted to implement two VCO designs on 5GHz band. These two VCOs with following characteristics are designed and fabricated. Firstly, they use low phase noise architecture with identical supply voltage to implement VCO. Notably, the difference of these two VCOs is the adoption of thick oxide and thin oxide devices to generate negative resistance. The stress issue of different oxide thickness was characterized between these two VCOs. According to the experience result, the adoption of thick oxide device shows excellent performance by considering both phase noise and reliability issues. Result of this thesis provides a valuable reference during the implementation of VCO in advance technology for RF and Base-Band single chip design.
URI: http://hdl.handle.net/11455/8573
其他識別: U0005-1908200908493700
文章連結: http://www.airitilibrary.com/Publication/alDetailedMesh1?DocID=U0005-1908200908493700
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