Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/96868
標題: 一個無需重新開機的暫存器物理不可複製函數設計
A Register-PUF Design without Power-Up Requirement
作者: 練智弘
Chin-Hung Lien
關鍵字: 硬體安全
物理不可複製函數
hardware security
physical unclonable function
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Yan, “DRAM-Based Intrinsic Physically Unclonable Functions for System-Level Security and Authentication,” in Proc. IEEE Int. Trans. on Very Large Scale Integration (VLSI) Systems, Vol. 25 no. 3, pp. 1085-1097, 2017. [18] SS. Kumar, J. Guajardo, and R. Maes, “The butterfly PUF protecting IP on every FPGA,” in Proc. IEEE Int. Hardware-Oriented Security and Trust (HOST), 2008, pp. 67-70 [19] Hassoun, Soha, and Tsutomu Sasao, eds. Logic Synthesis and Verification, Springer , 2012. [20] Ginosar and Ran, “Metastability and synchronizers: a tutorial,” in Proc. IEEE Int. Design & Test of Computers, 2011, pp. 23-35. [21] A. Vijayakumar and S. Kundu, “A novel modeling attack resistant PUF design based on non-linear voltage transfer characteristics,” in Proc. IEEE Int. Design, Automation & Test in Europe Conf. & Exhibition (DATE), 2015, pp. 653-658. [22] A. Roelke and M. R. Stan, “Attacking an SRAM-based PUF through Wearout,” in Proc. IEEE Int. Computer Society Annual Symposium on. VLSI (ISVLSI), 2016, pp. 206-211. [23] C. Helfmeier, C. Boit, D. Nedospasov, and J.-P. Seifert, “Cloning physically unclonable functions,” in Proc. IEEE Int. Symp. Hardware-Oriented Security and Trust (HOST), 2013, pp. 1–6. [24] X. Xu and DE. Holcomb, “Reliable puf design using failure patterns from time-controlled power gating,” in Proc. IEEE Int. Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2016, pp. 135-140. [25] M. Gao, K. Lai, and G. Qu, “A highly flexible ring oscillator PUF,” in Proc. 51th ACM/IEEE Design Autom. Conf., Jun. 2014, pp. 1–6. [26] G. Rose, N. McDonald, L.-K. Yan, and B. Wysocki, “A write-time based memristive PUF for hardware security applications,” in Proc. IEEE Int. Design Automation Conf., Jun. 2013, pp. 830–833. [27] Z. Chen, Y. Cai, Q. Zhou and, G. Qu, “An efficient framework for configurable RO PUF,” in Proc. IEEE Int. Symp. Circuits and Syst. (ISCAS), 2016, pp. 742-745. [28] X. Wang and M. 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摘要: 物理不可複製函數(Physical Unclonable Function, 簡稱PUF)在硬體安全(Hardware Security)議題中,已經成為了一個非常有吸引力的解決方法。例如裝置的認證(Identification)與驗證(Authentication)以及加密學的密鑰生成(Cryptographic Key Generation),皆可以使用物理不可複製函數的技術達成。 大多數的物理不可複製函數依賴電路結構中的特性來產生隨機的特徵。大至可分為兩類:基於延遲(Delay Based)的物理不可複製函數以及基於儲存元件(Storage Based)的物理不可複製函數。基於延遲的物理不可複製函數會有較多的額外面積需求(Area Overhead),而大多基於儲存元件的物理不可複製函數則需要利用開機來初始化儲存元件,進而當作物理不可複製函數所需的特徵。 在本篇論文中,使用D型正反器(D Flip-Flop)來當作物理不可複製函數的基準。雖然本設計是基於儲存元件的物理不可複製函數,但我們卻不需要利用開機初始化,只要改變電路的信號及可達到物理不可複製函數所需要的特徵,並且也有非常好的可靠度(Reliability)、隨機性(Randomness)以及獨特性(Uniqueness)。
Physical Unclonable Function (PUF) is an attractive solution to the hardware security issues. PUFs can be used for the identification and authentication of devices and the cryptographic key generation. Most PUFs rely on the variations of circuit element to generate random signature. The most popular PUFs include delay based PUFs and storage based PUFs. Delay based PUFs require more area overhead than storage based PUFs. The features of storage PUFs are normally generated by the initial values generated in the power up process. In this thesis, we use D flip-flop as base of PUF element. The proposed design is storage based PUF, but this PUF does not have to power up for initializing. In stead, the PUF signature can be generated repeatedly through a control signal. Experimental results show that the proposed design achieves good reliability, randomness, and uniqueness.
URI: http://hdl.handle.net/11455/96868
文章公開時間: 2018-08-25
Appears in Collections:資訊科學與工程學系所

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