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Investigation of Interdigitated Back Contact Structure for Monocrystalline Silicon Solar Cells
|關鍵字:||Interdigitated back contact;指叉狀背面電極;Solar cell;Wafer thickness;Wafer resistivity;Wafer lifetime;太陽電池;晶片厚度;晶片阻值;晶片載子生命週期||出版社:||材料工程學系所||摘要:||
經由實驗結果發現，有磷擴散建立之背電場與前電場太陽電池，其二極體特性會較明顯，利用氮化矽保護元件側壁可降低逆向飽和電流，另外射極之擴散深度必須要淺，環繞式背電場可提升並聯電阻(0.31至1.8 Mohm)，以及前電場磷擴散濃度不能太高。最後我們以標準製程製作出指叉狀背面電極太陽電池，元件的背面入光效率可達11.12 %、正面入光效率可達6.78 %。在晶片測試方面，我們發現晶片的厚度越薄(675至300 um)，元件的效率越高(3.06 至7.26 %)，較小的晶片阻值(6.37至4.92 ohm•cm)可得到較高效率的元件(0.95 至9.41 %)，晶片的載子生命週期越長(35至169 us)，元件的效率會越高(3.78 至 8.52 %)。
Recently, the interdigitated back contact solar cell (IBC-SC) has received much attention because the metal electrodes can be fabricated on the rear side of the cell. The IBC-SC has no shadowing effect. In this thesis, firstly, the process recipes including surface texturization, anti-reflection coating, and diffusion process were established. Then, the design and study of standard processes for the silicon wafer verification were performed. The IBC-SC was fabricated using high-temperature diffusion and photolithography techniques. The pattern design of interdigitated metal electrodes, phosphorus diffusion, SiNx passivation on cell edge, the depth of boron diffusion, the effect of back surface field (BSF) around, and phosphorus concentration of front surface field (FSF) were studied. Finally, the effects of silicon wafer thickness, resistivity, and lifetime on the IBC-SC performance were investigated.
The experimental results showed that the IBC-SC with BSF and FSF had more obvious diode characteristics. The SiNx passivation on cell edge had more obvious diode characteristics. Moreover, the emitter diffusion depth should be shallower. The pattern of BSF around could improve the shunt resistance (0.31 to 1.8 Mohm). Furthermore, a smaller FSF concentration was favorable. The conversion efficiency of 11.85 % on the rear side and 6.78 % on the front side for the IBC-SC fabricated using standard processes could be obtained.
For the wafer verification, it was found that the thinner wafer (675 to 300 um) could lead to higher cell efficiency (3.06 to 7.26 %). The smaller the wafer resistivity (6.37 to 4.92 ohm•cm), the higher the cell efficiency (0.95 to 9.41 %). The longer wafer lifetime (35 to 169 us) would also lead to higher cell efficiency (3.78 to 8.52 %).
|Appears in Collections:||材料科學與工程學系|
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