Please use this identifier to cite or link to this item:
Ultra Fine Flat Panel Display Packaging by 3um Anisotropic Conductive Film
|關鍵字:||high resolution;高解析度;anisotropic conductive film;display;hardness;IC;conductive resistance;異方性導電;顯示器;硬度;積體電路;導通阻抗值||出版社:||機械工程學系||摘要:||
In this research, dependency of the hardness of the IC gold bump and the properties of the conducting particle on the conducting resistance of the high resolution flat panel display packaging was investigated. Two kinds of IC gold bumps with material hardness 70Hv and 40Hv, respectively, and the currently smallest 3um conducting particle made by Sony Inc. were used to conduct the experiments.
To have deep investigation of the equivalent resistance, a novel resistance model based on the series resistance concept was proposed. Experiments were designed and carried out to distinguish the deviations of the theoretical and the actual impedance.
During the initial loading period of the flat panel display packaging, the IC gold bump acts as both a brace and a breaker for the conducting particle. It is more appropriate for the IC fabrication process that has a ring structure as the wall. In general, a harder gold bump should obtain more effective conducting particles and possesses lower impedance. A gold bump with less hardness becomes more conductive when an external loading is applied.
For the experimental results in this research, it was found that the impedance of the 3um conducting particle used in the flat panel display packaging is 0.5 ohm. The combined impedance of the 3um conducting particle and the IC gold bump with hardness 70Hv after bonding is far less than that of the ITO layout. It can be concluded that the 3um conducting particle and the IC gold bump with hardness 70Hv together can lead to a miniaturized device with less cost.
|Appears in Collections:||機械工程學系所|
Show full item record
TAIR Related Article
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.