Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/3261
標題: 週期性脈衝反轉式通孔填孔電鍍銅之研究
Periodic Pulse Reverse Cu Electroplating for Through Hole Filling
作者: 沈方瑜
Shen, Fang-Yu
關鍵字: 蝴蝶填充技術;Butterfly Technology;週期性脈衝反轉式電鍍;Periodic Pulse Reverse Plating
出版社: 化學工程學系所
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摘要: 
在現今消費性電子產業中,為符合產品體積縮減及多功能化的市場需求,高密度互連技術已成為增加線路密集度的關鍵,同時藉由晶片堆疊的技術發展,大幅縮減訊號傳遞距離,使其產品功能性迅速擴增,因此3D 晶片封裝技術已成為目前熱門的話題。
在高縱橫比通孔電鍍時,電流密度分布不均並且孔徑小,容易增加填孔的困難度,雖利用蝴蝶填充技術可以達到良好填孔效果,但必須操作在低電流密度,且無法使用過大強制對流,因強制對流易使添加劑均勻分散在孔內且易破壞孔內添加劑之濃度梯度,導致填孔良率低下,如不使用強制對流則電鍍時間過於冗長,因此需加入新的電鍍方式改善原有的技術。
在週期性脈衝反轉式電鍍通孔中,銅離子的遷移及擴散隨電流變化而改變,同時藉由電流方向的改變,產生濃度差使銅離子可以隨著梯度而向孔內擴散,此法可有效改善原有Butterfly Technology (BFT)低電流的極限,大幅降低總電鍍時間及面銅厚度,並可改善直流電鍍配方過於複雜而造成控制與添加的問題。
本文成功填鍍孔深425微米,孔徑150微米的印刷電路板通孔,完成超級填充,並且銅結構緊密,無孔洞及裂痕產生,並且進一步成功應用在孔深320微米,孔徑50微米的矽晶圓通孔,解決了電鍍時間冗長及鍍液添加劑複雜的問題。

In the global consumer electronics industry, high- density interconnection (HDI) is a key for increasing the circuit density in order to meet the marketing requirements of volume shrinkage and multi-function. Besides, three-dimensional (3D) IC chip packaging become a hot topic because it significantly reduces the distances among device circuits and reduce the volume of packaged devices to increase the functions of electronic products.
Uneven distribution of current density and small hole diameter increase the difficulty of hole filling by copper electroplating, especially at a high aspect ratio. Although Butterfly Technology (BFT) can achieve through hole filling, it has to be operated at a low current density for a long plating time. Besides, additive concentration gradient inside the through hole will easily be eliminated by strong forced convention. Therefore, we need to develop a new plating method to improve it.
For periodic pulse reverse (PPR) plating, the migration and diffusion direction of copper ions can be controlled by the deposition (reduction) and dissolution (oxidation) currents. The dissolution current can result in a large cupric ion concentration gradient along the through hole which forces cupric ion to diffuse to a deeper place in the through hole, such that PPR plating improves the limitation of a low current density of BFT. In addition, PPR plating also shortens overall plating time, enhances current efficiency, simplifies formulation, and thins copper thickness on the board surface.
In this work, the through hole of a printed circuit board, whose diameter and depth was 150 μm and 425 μm, respectively, was successfully filled with dense copper and without a void and crack by using the PPR plating method. PPR plating also can be applied to silicon wafer metallization with a hole diameter was 50 μm, and 320 μm, respectively. It solved these problems of a long plating time and a complex formula.
URI: http://hdl.handle.net/11455/3261
其他識別: U0005-1807201313582200
Appears in Collections:化學工程學系所

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