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標題: | A parallel built-in self-diagnostic method for nontraditional faults of embedded memory arrays | 作者: | Arora, V. 黃德成 Jone, W.B. Huang, D.C. Das, S.R. |
關鍵字: | built-in self-diagnosis;embedded memory array testing;march;algorithms;nontraditional memory fault model;serial interfacing;technique;repair | Project: | Ieee Transactions on Instrumentation and Measurement | 期刊/報告no:: | Ieee Transactions on Instrumentation and Measurement, Volume 53, Issue 4, Page(s) 915-932. | 摘要: | In this paper, we propose a built-in self-diagnostic march-based algorithm that identifies faulty memory cells based on a recently introduced nontraditional fault model. It is developed based on the DiagRSMarch algorithm, which is a diagnostic algorithm to identify traditional faults for embedded memory arrays. A minimal set of additional operations is added to DiagRSMarch for identifying the nontraditional faults without affecting the diagnostic coverage of the traditional faults. The embedded memory arrays are accessed using a bidirectional serial interfacing architecture which minimizes the routing overhead introduced by the diagnosis hardware. Using the concepts of the bidirectional interfacing technique, parallel testing, and redundant-tolerant operations, the diagnostic process can be accomplished efficiently at-speed with minimal hardware overhead. |
URI: | http://hdl.handle.net/11455/38026 | ISSN: | 0018-9456 | DOI: | 10.1109/tim.2004.830785 |
Appears in Collections: | 資訊科學與工程學系所 |
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