Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/38650
標題: (IEEE Transactions on CAD,21(5):617-628)A Parallel Transparent BIST Method for Embedded Memory Arrays by Tolerating Redundant Operations
作者: D. C. Huang 
W. B. Jone
關鍵字: March operations;memory fault model;memory test;test interrupt;transparent test
出版社: USA: IEEE Circuits and Systems Society
Project: IEEE Transactions on CAD, Volume 21, Issue 5, Page(s) 617-628.
URI: http://hdl.handle.net/11455/38650
Appears in Collections:資訊科學與工程學系所

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