Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/43917
標題: Fabrication of amorphous si thin-film transistors on an engineered parylene template using a direct separation process
作者: Chiang, C.C.
洪瑞華
Wuu, D.S.
Chen, Y.P.
Jaw, T.H.
Horng, R.H.
武東星
關鍵字: poly-si;performance;technology;displays;tft
Project: Electrochemical and Solid State Letters
期刊/報告no:: Electrochemical and Solid State Letters, Volume 11, Issue 1, Page(s) J4-J7.
摘要: 
This article reports on the fabrication of flexible amorphous silicon (a-Si) thin-film transistors (TFTs) on a parylene template carried by a glass plate without any adhesive. The a-Si TFTs can be separated directly from the glass carrier after a process temperature up to 220 degrees C. The performance of a-Si TFTs on the engineered parylene template (parylene/SiNx/parylene) has nearly identical electrical characteristics as those of the TFTs directly on a glass substrate. After the 10 mm radius bending test for 10(4) times, the a-Si TFTs still exhibit good transistor behavior with the on-off current ratio exceeding 10(5) and electron mobility of 0.252 cm(2)/V s. (C) 2007 The Electrochemical Society.
URI: http://hdl.handle.net/11455/43917
ISSN: 1099-0062
DOI: 10.1149/1.2805080
Appears in Collections:材料科學與工程學系

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