Surface treatment and electrical properties of directly wafer-bonded InP epilayer on GaAs substrate

Abstract

We have investigated the surface morphology and electrical properties of directly wafer-bonded GaAs and InP by surface treatment and fusion annealed temperatures. The surface morphologies of bond samples with and without pattern under uniaxial pressure with thermal treatment in N-2 ambient were compared. It was found that the peeling, bubbles and cracks have almost completely eliminated and high quality fusion surface area of 2 cm x 2 cm can be obtained using the pattern with 3000 mum pitch and 10 mum width channel. Bonded interfaces were also characterized by transmission electron microscopy and revealed that neither threading dislocation nor stacking fault. The current-voltage characteristics have also been demonstrated to be results from different wafer cleaning processes and bonding at various temperatures. Using the H2SO4:H2O2:H2O and dilute HF etching solution, the free barrier interface of n-InP (2 x 10(19) cm(-1)) bonded to n-GaAs (1 x 10(18) cm(-3)) at 550 degreesC can be obtained. (C) 2002 Elsevier Science Ltd. All rights reserved.