Please use this identifier to cite or link to this item:
標題: High Turn Ratio and High Coupling Coefficient Transformer in 90-nm CMOS Technology
作者: Hsu, H.M.
Chen, K.Y.
關鍵字: Coupling factor;multistack transformer;turn ratio;on-chip transformers;monolithic transformers;silicon;design
Project: Ieee Electron Device Letters
期刊/報告no:: Ieee Electron Device Letters, Volume 30, Issue 5, Page(s) 535-537.
A novel layout of IC transformer is proposed to achieve both high turn ratio and coupling coefficient in this letter. Two groups of proposed devices are designed to maintain identical self-inductances in the transformer's primary and secondary coils. A total of six devices are fabricated in foundry 90-nm CMOS technology. Using the nine and five metal layers in the primary and secondary coils in a specific layout, measurement results show that the proposed transformer simultaneously achieves high turn ratio and coupling coefficient with values of 1.9 and 0.89, respectively, in a 92-mu m outer dimension.
ISSN: 0741-3106
DOI: 10.1109/led.2009.2015784
Appears in Collections:電機工程學系所

Show full item record

Google ScholarTM




Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.