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|標題:||A two-step etching method to fabricate nanopores in silicon||作者:||Wang, G.J.
|關鍵字:||scales||Project:||Microsystem Technologies-Micro-and Nanosystems-Information Storage and Processing Systems||期刊/報告no：:||Microsystem Technologies-Micro-and Nanosystems-Information Storage and Processing Systems, Volume 14, Issue 7, Page(s) 925-929.||摘要:||
A cost effective method to fabricate nanopores in silicon by only using the conventional wet-etching technique is developed in this research. The main concept of the proposed method is a two-step etching process, including a premier double-sided wet etching and a succeeding track-etching. A special fixture is designed to hold the pre-etched silicon wafer inside it such that the track-etching can be effectively carried out. An electrochemical system is employed to detect and record the ion diffusion current once the pre-etched cavities are etched into a through nanopore. Experimental results indicate that the proposed method can cost effectively fabricate nanopores in silicon. A through pore with pore size being around 14 nm can be fabricated.
|Appears in Collections:||生醫工程研究所|
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