Please use this identifier to cite or link to this item:
標題: 製作規則排列之矽及矽化物奈米結構陣列及其光電性質之研究(I)
Fabrication and Optical and Electrical Characteristics Measuremnet of Silicon and Metal Silicide Nanostructure Arrays(I)
作者: 許薰丰
關鍵字: 基礎研究;Scanning probe lithography, nanosphere lithography, silicon, silicide, nanowires,electric characteristics measurement.;材料科技;掃描探針微影術;奈米球微影術;矽;矽化物;奈米線;電性量測
隨著元件尺寸進入奈米等級,奈米結構材料的製備,成為微電子學上的重要課題。在半導體元件中,矽基材料仍被廣泛的應用,而低電阻率金屬矽化物應用於金屬接觸、閘電極或元件間連線,另外,鐵矽化物則是具有發展潛力的發光半導體。然而,一維奈米結構材料受到表面效應及尺寸效應的影響,反應出特殊的光、電性質。因此,優質的一維矽及金屬矽化物奈米結構具有潛力應用於下一世代電子及光電元件。目前最大的挑戰仍為製作規則排列之「free-standing」奈米線及控制尺寸的均一性。本計劃將利用「自組裝奈米球微影術(self assembly nanosphere lithography)」在矽基材表面製作規則排列之模板,製備大面積二維排列之金屬奈米粒子或奈米網陣列,並利用金屬粒子的催化作用化學蝕刻矽基材,製備「free-standing」單晶矽奈米線陣列,嘗試不同的金屬蒸鍍方式,達到操控成長低電阻率金屬矽化物奈米線陣列及發光半導體鐵矽化物奈米線陣列,並探討矽化物由於尺寸效應對其電學及光學性質的影響。更進一步研究不同方位之矽奈米線對於金屬矽化物奈米線生成之顯微結構及光電性質的影響,電性量測方面則以黃光微影配合掃瞄探針微影術製作電極,量測矽化物奈米線之電性。相關的研究成果將對於半導體元件中成長優質矽及金屬矽化物奈米線提供重要的參考依據。

With continuous shrinking of the dimensions of integrated devices, the nanostructurematerials fabrication is an important subject of the microelectronics. The Si-based materialsare used popularly in the semiconductor device technology. Low-resistivity metal silicides areused as Ohmic contacts, gate electrode, and interconnectors. In addition, iron silicide is aexpected materials used in illumination device. However, one dimensional nanomaterials areof much interest for their extraordinary optical and electrical properties owing to the highsurface/volume ratio, high surface energy and size effect. As a result, high quality silicon andmetal-silicide nanowires may lead to novel applications as electrical and optoelectric devices.The major challenge of synthesis of silicon and metal-silicide nanowires is to fabricateperiodicity, free-standing and size uniformity nanowires.To fabricate the silicon nanowire arrays, self assembly nanosphere lithography (NSL)was utilized. In this technique, the well ordered patterns are fabricated on silicon substratesurface by self-assembly of polystyrene nanospheres. After silver thin films deposition andthe nanospheres lift-off, a series of the periodic silver nanopaticle arrays or mesh can beobtained. The 「free-standing」 silicon nanowires arrays were obtained by scratching a siliconsurface with catalytic metal particles or mesh. Metal silicide nanowires formed by metaldeposition and annealing or reactive deposition epitaxy (RDE) process.In this project, we will focus on studying the effects of the size of nanowires on theoptical and electrical properties. Further, the influence of the orientation of Si nanowires formetal-silicide formation will be investigated. The electric property measurement is used byscanning probe lithography and four-point probe measurement method. These results willprovide useful information to grow high quality, nanoscale silicon and metal-silicide wires forelectric and optoelectric devices.
其他識別: NSC96-2221-E005-108
Appears in Collections:材料科學與工程學系

Show full item record

Google ScholarTM


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.