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標題: 適用於下世代混合光纖通訊系統之正交分頻多工接收機晶片設計-子計畫二:混合光纖通訊系統之光電界面及射頻前端電路設計(I)
O/E Interface and Rf Front-End Circuit Design for Hybrid Optical Fiber Communication Systems
作者: 江衍忠
關鍵字: 下世代被動光纖網路;電子電機工程類;光纖載入射頻系統;光電界面;射頻前端電路;整合型晶片;應用研究
This project is mainly to support the integrated project “Next-Generation Receiver ChipDesign for OFDM based Hybrid Optical Fiber Communication Systems” in which we havethe requirement of O/E interface circuit and radio-frequency front end. Since the available10Gbps optical transceivers are still too expensive for commercial applications, we try todevelop an O/E interface circuit for the next-generation passive optical network (NG-PON).Besides, the second part of our project is the Radio-over-Fiber (RoF) system, thus we needto improve the O/E interface to fit the system requirement and we also need to develop theRF front end circuits. Compare with the conventional transceiver architecture, the mostcircuits in the RF transmitter will be replaced by the optical modulator in our project, and weneed only to design a power amplifier (PA) and a complete superheterodyne receiver. Theprocess that we plan to use is the TSMC 90nm MS/RF CMOS technology for most of ourcircuits, and we may try to enhance the performance of PA by adopting WIN 0.15m GaAsprocess. All of the processes are provided by the Chip Implementation Center (CIC)In the first year, we will run the system simulation for whole system to decide the detailspecifications for each sub-circuit. We will also finish the design of circuits such astransimpedance amplifier (TIA), automatic-gain-control amplifier (AGC), 60 GHz low noiseamplifier (LNA). We will also try to integrate all the NG-PON circuits of the executingproject and measure the performance of the system for fine tuning. In the second year, wewill finish the design of RF mixer, IF mixer and band-pass/low-pass filters, the poweramplifier (PA), and the integrated receiver front end. We will also try to integrate all the RoFcircuits and measure the performance of the system for fine tuning.

本計畫主要因應總計畫:『適用於下世代混合光纖通訊系統之正交分頻多工接收機晶片設計』中之光電界面以及射頻發射接收電路之需求而生。由於目前高速10GbpsOptical Transceiver 價格過於昂貴,因此本整合型計畫中發展之下世代被動光纖網路中,我們試圖自行開發接收機部份之光電界面電路。此外,整合計畫的第二部份我們計畫將光纖系統加入光載射頻訊號之能力,因此除了對光電界面我們需再進一步改進外,計畫中也有對60GHz 射頻訊號的發射接收機之需求。不過相對於一般的發射接收系統而言,本計畫中的發射機部份只需設計光纖末端的功率放大器即可,發射機的其他部份擬採光調變系統取代;至於接收機的部份則仍設計一完整的二次降頻接收機。使用之製程技術暫擬採用台積電量產的90 奈米MS/RF CMOS 製程,在較為大功率需求的功率放大器模組則考慮採用WIN 0.15 微米GaAs 製程來實現;這些基本上是國研院晶片系統設計中心所提供。預計第一年先就所需之系統規格預作系統模擬,以決定各別子電路之詳細規格。同時完成光電界面前端電路中之轉阻放大器、自動增益控制放大器及60GHz 低雜訊放大器等子電路之設計與開發;以及整合目前已執行之計畫中NG-PON 電路。第二年則主要設計RF 及IF 降頻混波器、高效能帶通/低通濾波器、功率放大器等等子電路。同時對整體射頻前端接收機電路做一整合之量測與微調;還有與其他子計畫之整合與介面修正。
其他識別: NSC100-2221-E005-057
Appears in Collections:電機工程學系所

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