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標題: 應用於汽車雷達高速分數型頻率合成器之設計與實現
Design and Implement of High Speed Fractional Frequency Synthesizer for Automotive Radar
作者: 林佳俊
Lin, Jia-Jiun
關鍵字: phase locked loop;鎖相迴路;frequency synthesizer;phase noise;voltage control oscillator;頻率合成器;相位雜訊;振盪器
出版社: 電機工程學系所
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第二,本論文使用了電流重複利用的技巧,來減少功率的消耗,我們延續先前高頻電路上的設計技巧,以及結合電流重複利用的方式,來達到既高速又低功率消耗的振盪源,此電路實現於TSMC 0.18um標準CMOS製程,在1.8V電壓操作下功率消耗為6.7mW,其振盪器在輸出頻率為5GHz下,相位雜訊為-126.96 dBc/Hz@1MHz,其倍頻器在輸出頻率為9.94GHz下,相位雜訊為-118.38 dBc/Hz@1MHz。
最後一部分,本論文提出了高速且具雙模數的預除器,去解決高速頻率合成器所帶來解析度不足的缺點,此架構除了可應用於高速頻率合成器外,在抑制分數型頻率合成器(ΔΣ架構)的量化雜訊,也可預期有相當顯著的成果,在電路實現過程中遇到的Spike問題,此預除器也將一併解決之,此電路在一倍頻與二倍頻輸出,分別為11GHz、22GHz,其相位雜訊在1MHz偏移處為-89.75 dBc/Hz、-106.72 dBc/Hz。在1.8V電壓操作下功率消耗為28mW,晶片面積為1.19 × 1.22 mm2。

With the rapid advances in technology, the operation frequency of the microprocessor is increasing rapidly. In wireless communication system, the wide bandwidth technique proposed future trends.In the thesis we proposed take high-speed wireless communications as the research topic.

First, a Colpitts oscillator which is used to the automotive radar is introduced. Its oscillator frequency and start condition are different from the traditional ones. We derivate and simulate this oscillator to prove that it can operate in high frequency and be easy to oscillate.

The second part describes a current-reused quadrature VCO with a frequency doubler to achieve the high-frequency and low-power characteristics. The crcuit is fabricated in TSMC 0.18um CMOS process, and the power consumption is 6.7mW under a 1.8-V supply voltage. At 1-MHz offset from a 5-GHz carrier of the oscillator and a 9.94-GHz carrier of the frequency multiplier, the measured phase noises are -126.96 dBc/Hz and -118.38 dBc/Hz respectively.

Finally, to solve the problem of insufficient resolution in a high-speed frequency synthesizer, a high-speed and dual-modulus prescaler is presented. This architecture can not only apply to high-speed frequency synthesis but also suppress quantization noise in the delta-sigma modulator based frequency synthesizers. Moreover, the proposed circuit can solve the spike in the prescaler. The chip output frequencies are 11GHz and 22GHz on the main tone and the double tone respectively. The phase noise at 1MHz offset are about -106.72dBc/Hz and -89.75dBc/Hz. It dissipates 28mW with 1.8-V supply, and the total area is 1.19×1.6mm2
其他識別: U0005-0406201215070200
Appears in Collections:電機工程學系所

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