Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/6145
標題: 非晶矽薄膜電晶體特性及可靠度的研究
Study on the Characteristics and Reliability of Hydrogenated Amorphous Silicon Thin Film Transistors
作者: 林明杉
Lin, Ming-San
關鍵字: Amorphous Silicon TFT;非晶矽薄膜電晶體;Reliability;可靠度
出版社: 電機工程學系所
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Xianbo, “Evidence for Light-Indeced Increase of Si-H Bonds in Undoped a-Si:H” , Phys Rev. Lett. vol 74, No. 4, pp.558-561, 1995. [18] G. N. Parson, “Enhance Mobility Top-Gate Amorphous Silicon Thin-Film Transistor with Selectively Deposited Source/Drain Contacts” , IEEE Electron Device Lett., vol.13, No.2, pp.80-82, 1992. [19] S. M. GadelRab, A. M. Miri, and S. G. Chamberlain, “A Comparison of the Performance and Reliability of Wet-Etched and Dry-Etched a-Si:H TFT’s” , IEEE Trans. Electron Device, vol.45, No.2, pp.560-563, 1998. [20] D. B. Thomasson, Student Member, “Thin Active Layer a-Si:H Thin-Film Transistors” ,IEEE Electron Device Lett., vol.18, No.3, pp.117-119, 1997. [21] S. W. Lee, K. S. Cho, B. K. Choo, and J. Jang, Member, “Copper Gate Hydrogenated Amorphous Silicon TFT With Thin Buffer layer” , IEEE Electron Device Lett., vol.23, No.6, pp.324-326, 2002. [22] J. H. Choi, C. S. Kim, B. C. Lim, and J. Jang, “A Novel Thin Film Transistor Using Double Amorphous Silicon Active Layer” , IEEE Trans. Electron Device, vol.45, No.9, pp.2074-2076, 1998. [23] Y. J. Choi, W. K. Kwak, K. S. Cho, S. K. Kim, and J. Jang, “Hydrogenated Amorphous Silicon Thin-Film Transistor with a thin Gate Insulator” , IEEE Electron Device Lett., vol.21, No.1, pp.18-20, 2000. [24] C. Y. Wu, C. H. Chen, Y. C. Kuan, and K. S. Sun,“High Stable a-Si:H TFTs Prepared with Optimum SiNx Films by PECVD Using Taguchi Method” ,IDW, pp.1085-1088, 2005. [25] I. Uamura, K. Kitammezu, T. Kuwura, T. Tsuchida, “Effect of plasma treatment on the density of defects at an amorphous Si:H-insulator interface” , J. Appl. Phys.91, pp.2009-2014, 2002. [26] C. Y. Wu, C. H. Ma, “Effect of interface plasma Treatments on the Electrical Properties of a-Si:H TFTs”, IDW, pp.1085-1088, 2005. [27] Y. Byun, D. Beer, M. Yang; T. Gu “A novel amorphous silicon thin film transistor for AMLCDs” , Device Research Conference, 1995. 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摘要: 
本論文主要探討在現有基礎上,利用電漿再處理製程,把通道因為做乾蝕刻而被高能電漿所造成的破壞修復,以期能改善薄膜電晶體漏電流及可靠度的問題。我們以完成三道光罩之後通道蝕刻(BCE)非晶矽薄膜層以NH3電漿處理,找出較佳的處理條件,比較其處理前和處理後之電性的差異。也因為在現今製程的技術上,將閘極驅動電路做於玻璃基板上,電晶體的可靠度愈趨於重要,所以我們將處理過後的電晶體利用兩種方法去做其可靠度的分析:

1.直流定電壓應力的測試:在不同的NH3電漿處理條件之下,對未處理及處理過的電晶體做定電壓應力的測試,亦即電晶體在相同的偏壓之下,在一固定時間裡,定電壓應力對不同NH3電漿處理條件的影響。由於在加定電壓應力測試後,介電層與主動層接觸表面以及介電層內均會有電荷陷阱捕捉的現象發生,會使得臨界電壓偏移,開電流的下降及轉移電導等電性的退化。且主動層內的會有能態生成的現象發生,會產生較多的矽懸浮鍵。

2.紫外光的應力測試:利用不同NH3電漿處理條件,我們以固定高度的紫外光(即固定其能量),分別對處理過後的電晶體做紫外光的應力的分析。也就是在不同的照光時間下,紫外光對NH3電漿處理條件下元件特性的影響。在經過紫外光應力測試後,會使Si-N鍵,N-H鍵及Si-H鍵之鍵結變弱,以致於電晶體的穩定度變差,但在經過電漿處理過後,上述的現象會有明顯的改善。

最後我們綜合以上的兩種可靠度的分析,找到一組最佳的NH3電漿處理條件,使我們的後通道蝕刻薄膜電晶體在經過電漿處理過後,漏電流有明顯的降低,且對紫外光及定電壓應力的測試,其電性方面能有最佳的抵抗能力,即臨界電壓偏移,次臨界擺幅變化,開電流的降低,並不會受到直流定電壓及紫外光應力的影響而有較大的變化,故我們用NH3電漿所處理的電晶體能達到最佳效果

This paper is the investigation of basing on present technology, and using plasma rework to recover the damage caused by high energy plasma. We expect that can improve the leakage current and reliability issue of a-Si TFT. We use NH3-plasma to treat on the back-channel-etching(BCE type) TFT with three mask process, and find out the optimum conditions, and then compare the electrical characteristic of the TFTs with and without plasma treatment. Because the reliability of the present technology of TFT process is very important, especially in gate driver on glass we use two methods to analyze the reliability:

1. Constant voltage stress: under various plasma conditions, we use constant voltage stress to analyze the TFTs with and without NH3 plasma treatment, that is, under a fixed time period, the effect of the same voltage on TFTs with different NH3 plasma conditions. Because there are trapped charges in the interface between dielectric layer and active layer and inside the dielectric layer, they will cause the shift of threshold voltage, ON current, Gm and so on. Besides, there is state generation in the active layer, therefore much more Si dangling bond would occur.

2. UV light stress: We do UV light stress on the TFTs with NH3 plasma treatment. We fix the distance between samples and UV light, or we fix the power density of the UV light. The UV light illuminates on the TFTs with different time, so that we can observe the UV light effect on the TFTs. After UV light stress, the weaker Si-N bond, N-H bond, and Si-H bond would be broken, which make the bad stability of the TFTs. But when we treat the TFTs with proper NH3 plasma, these problems would be solved.

Finally, we combine these two analyses of reliability, and we find out the best NH3 plasma condition. When we use the back channel etching TFTs with this condition, the leakage current will obviously reduce. And the electrical characteristics have the least degradation, that is, the shift of threshold voltage, the change of subthreshold swing, and the decreasing of ON current would not have large difference after the constant voltage stress and UV light stress. Therefore, we can conclude that proper NH3 plasma treatment on the TFTs can achieve the best characteristic of TFTs.
URI: http://hdl.handle.net/11455/6145
其他識別: U0005-0508200614393900
Appears in Collections:電機工程學系所

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