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標題: 多值準位快閃式記憶體之高速電流模式準位判讀電路
High-Speed Current-Mode Level-Identifying Circuits for Multilevel Flash Memories
作者: 陳建志
Chen, Chein-Zhi
關鍵字: Current-Mode;電流模式;Multilevel Flash Memories;Current mode comparator;多值準位快閃式記憶體;電流模式比較器
出版社: 電機工程學系
為了完成一個細胞存n 位元時,臨界電壓的分佈在每一個細胞呈現m=2n的分佈,因此使的週邊的判別電路須要一高解析度、快速多值準位判讀電路,判別出記憶體細胞不同準位。
在論文我們是使用全客戶型的方法設計兩個新的平行式準位判讀電路,來實現快速和精確的判讀細胞內的多值準位。晶片是以TSMC 0.6mm製程製造完成,並透過HP4145 、8110A 150Mhz pulse generator 和示波器量測晶片。第一版的電流模式判別電路細胞從一個準位變化到另一準位模擬時只要3.5nsec,量測時只需要5.5nsec。第二版之電路我們加入讀和選擇的控制信號,模擬只要0.3nsec就能判讀出來,和量測結果也極接近。

In recent years, several types of Flash memories have been proposed to enhance the density. Non-volatile memories storing more than one bit per cell are the attractive solution for semiconductor mass storage due to higher storage density without shrinking the memory cell. Therefore, the cost per bit and density can be reduced.
To achieve n-bit-per cell storage, the number of distinguishable threshold levels in a cell should be m=2n. Hence, more complicated sensing architectures with short sensing time and high resolution are required to identify different levels.
In this thesis, the full-custom design method was used to implement the new parallel current-mode multilevel identifying circuit to achieve high sensing speed at low supply voltage in small chip area. It was fabricated by TSMC 0.6mm SPDM process, and measured by HP4145、8110A 150Mhz pulse generator and oscilloscope.
Two versions of high-speed parallel current-mode identifying circuit were proposed and verified by simulation and measurement. The time required to switch from one level to another level is about 3.5nsec by simulation and 5.5nsec by measurement for the first version. The second version with controlled clocks reaches 0.3nsec by simulation and reasonably agrees with the measurement.
Appears in Collections:電機工程學系所

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