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Design and Analysis of High Speed Frequency Synthesizers Using an Integrated Transformer-Based Feedback Technique
|關鍵字:||Frequency Synthesizers;頻率合成器;Transformer;變壓器||出版社:||電機工程學系所||引用:|| B. Razavi, “Design of Analog CMOS Integrated Circuits,” McGraw-Hill, 2000.  B. Razavi, “Design of integrated circuits for optical communications,” McGraw-Hill, 2003.  N. M. Nguyen and R. G. Meyer, “Start-up and frequency stability in high-frequency oscillators,” IEEE J. Solid-State Circuits, vol. 27, pp. 810-820, May 1992.  D. M. Pozar, “Microwave Engineering Third Edition,” Wiley, 2005.  M. Tiebout, “Low-power low-phase-noise differentially tuned quadrature VCO design in standard CMOS,” IEEE J. Solid-State Circuits, vol. 36, no. 7, pp. 1018-1024, July 2001.  J. Maget, M. Tiebout, and R. Kraus, “MOS varactors with n- and p-type gates and their influence on an LC-VCO in digital CMOS,” IEEE J. Solid-State Circuits, vol. 38, no. 7, pp. 1139-1147, July 2003.  R. Castello, P. Erratico, S. Manizini, and F. Svelto, “ A 30% tuning range varactor compatible with future scaled technologies,” in Proc. Symp. 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Richard, et al., “A 17.5-to-20.94GHz and 35-to-41.88GHz PLL in 65nm CMOS for wireless HD applications,” ISSCC Dig. Tech. Papers, pp. 252-253, Feb. 2010.  Z. Li and K. K. O, “A low-phase-noise and low-power multiband CMOS voltage-controlled oscillator,” IEEE J. Solid-State Circuits, vol. 40, no. 6, pp. 1296-1302, Jun. 2005.  K. Kwok and H. C. Luong, “Ultra-low-voltage high-performance CMOS VCOs using transformer feedback,” IEEE J. Solid-State Circuits, vol. 40, no. 3, pp. 652-660, Mar. 2005.  H.-H. Hsieh, Y.-C. Hsu, and L.-H. Lu, “A 15/30-GHz dual-band multiphase voltage-controlled oscillator in 0.18-μm CMOS,” IEEE Trans. Microw. Theory Tech., vol. 55, no. 3, pp. 474-483, Mar. 2007.||摘要:||
This thesis describes the feasibility study of variable inductance realized with integrated transformer and frequency synthesis based on phase-locked loop technique. There are five major parts in this thesis discussed in detail.
The first part of this thesis discusses the traditional LC VCO applied capacitive varactors and its disadvantages. The proposed structures employ integrated transformers as inductance with voltage-controlled value. The traditional approach of tuning the VCO oscillation frequency by capacitance variation would be sacrificed, while the proposed structure with induction variation will be applied to substitute for that. Two kinds of the VCOs are proposed. One is the gain-controlled oscillator, and the other is the transconductance-controlled oscillator.
The second part of the thesis would introduce the concept of phase-locked loop, and describe about how it operates. The differences between integer-N and fractional-N frequency synthesizer, in addition to the fractional-N one realized with a delta-sigma modulator would be discussed.
The third part is designing a low supply voltage circuit without decreasing the Vt of the MOS transistor, while the oscillated signals of the tank translate through the ground node or the supply voltage node. By this way, these signals through the ground node and the supply voltage node oscillate at the same time and might operate at a low voltage supply and also decrease the supply noise.
The fourth part introduces several techniques to promote operation frequency and the tuning frequency range.
In the last part, we use a current reused technique to reduce the circuit power consumption. The high-frequency and low-voltage design employs the technique and concept of current reuse to achieve the high frequency and low power phase-locked loop design.
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