Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/6494
標題: 展頻調變抑制電磁干擾之脈衝寬度調變切換式降壓穩壓器
PWM Switching Buck Regulator Using Spread-Spectrum Modulation for EMI Reduction
作者: 楊欣達
Yang, Hsin-Ta
關鍵字: EMI;電磁干擾;DC-DC converter;Spread-Spectrum Modulation;直流轉直流轉換器;展頻調變
出版社: 電機工程學系所
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Tsai, “Digitally controlled low-EMI switching converter with random pulse position modulation,” in IEEE Asian Solid-State Circuits Conf., pp. 341-344, Nov. 2009. [7]C. H. Tsai, “Spread-Spectrum Clock Generators for PWM Converter,” M.S. thesis, National Taiwan Ocean University, 2008. [8]F. Lin and D. Y. Chen, “Reduction of power supply EMI emission by switching frequency modulation, IEEE Transaction on Power Electronic,” vol. 9, no. 1, Jan 1994. [9]J. Balcells, “SSCG Methods of EMI Emissions Reduction applied to Switching Power Converters,” Ph.D. dissertation, Universitat Polit`ecnica de Catalunya, Spain, Jul. 2004. [10]J. Kim, J. Kim, P. Jun, “Dithered Timing Spread Spectrum Clock Generation for Reduction of Electromagnetic Radiated Emission from High-speed Digital System,” in Proc. IEEE Int. Symp. Electromagn. Compat., 2002, pp. 413-418. [11]C. C. Wang, T. J. Lee, C. C. Li, and R. Hu, “An All-MOS High Linearity Voltage-to-Frequency Converter Chip with 520 KHz/V Sensitivity,” IEEE Trans. Circuits Syst. II, Exp. Briefs, vol. 53, no. 8, pp. 744-747, Aug. 2006. [12]J. L. Huang, “Design of 6-bit Flash ADC and 10-bit voltage-segmented DAC,” M.S. thesis, National Chi Nan University, 2010. [13]C. P. Basso, Switch-Mode Power Supplies—SPICE Simulations and Practical Designs. New York: McGraw-Hill, 2008. [14]F. W. Chien, “A High Efficiency and Wide Range Dual-Mode Buck Converter,” M.S. thesis, National Chung Hsing University, 2007. [15]K. N. Leung and P. K. T. Mok, “A sub1-V 15-ppm/ C CMOS bandgap voltage reference without requiring low threshold voltage device,” IEEE J. Solid-State Circuits, vol. 37, pp. 526-530, Apr. 2002. [16]R. Gregorian, Introduction to CMOS Op-Amps and Comparators. New York: Wiley, 1999. [17]C. Yoo, “A CMOS buffer without short-circuit power consumption,” IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 47, no. 9, pp. 935-937, Sep. 2000. [18]A. J. Stratakos, S. R. Sanders, and R. W. Brodersen, “A low-voltage CMOS DC-DC converter for a portable battery-operated system,” in Proc. IEEE Power Electronics Specialists Conf., 1994, pp. 619-626. [19]C. N. Chen, “A Current-Mode CMOS DC-DC Switching Converter with on-chip Current-Sensor,” M.S. thesis, National Taiwan University of Science and Technology, 2007. [20]D. Ma, W.-H. Ki, C. Y. Tsui, and P. K. T. Mok, “Single-inductor multiple-output switching converters with time-multiplexing control in discontinuous conduction mode,” IEEE J. Solid-State Circuits, vol. 38, pp. 89-100, Jan. 2003. [21]J. L. Wu, “A Low-Voltage Synchronous Rectification Boost Converter for Portable Devices,” M.S. thesis, National Chung Hsing University, 2007. [22]S. R. Wu, “DC to DC IC Design for Driver System of Ultra-High Performance Lamp,” M.S. thesis, Chienkuo Technology University, 2007. [23]A. Julsereewong, S. Pongswatd, P. Julsereewong, K. Tirasesth, H. Sasaki, and Y. Shi, “Buck Converter Controlled by Using Variable Switching Frequency Technique,” Electron Devices and Solid-State Circuits, EDSSC 2008. [24]M. Kuisma, T. Järveläinen, and P. Silventoinen, “Analyzing voltage ripple in variable-frequency DC/DC boost converter,” in Proc. 35th Annu. IEEE PESC, Aachen, Germany, Jun. 2004, vol. 1, pp. 1085-1089. [25]H. Sadamura, T. Daimon, T. Shindo, H. Kobayashi, T. Myono, T. Suzuki, S. Kawai, and T. IIJima, “Spread-spectrum clocking in switching regulators to reduce EMI,” in Proc. 3rd IEEE AP-ASIC, Taiwan, 2002, pp. 141-144. [26]B. A. Miwa, D.M. Otten, and M. E. Schlecht, “High efficiency power factor correction using interleaving techniques,” in Proc. IEEE Appl. Power Electron. Conf. Expo (APEC'92), 1992, pp. 557-56. [27]P. Zumel, O. García, J.A. Cobos, and J. Uceda, “Exploring Interleaved Converters as an EMI Reduction Technique in Power Converters”, IECON'02. [28]C. Chang and M. Knights, “Interleaving technique in distributed power conversion systems,” IEEE Trans. Circuits Syst. I, vol. 42, pp. 245-251, May 1995. [29]Y. C. Lien, “A 6-bit 1-GS/s 30-mW ADC in 90-nm CMOS Technology,” M.S. thesis, Taiwan University, 2007. [30]J. Mon, J. Gago, D. Gonzalez, J. Balcells, R. Fernandez, and I. Gil, “A new switching frequency modulation scheme for EMI reduction in multi-converter topology,” Power Electronics and Applications, 2009. EPE ''09.
摘要: 
脈衝寬度調變切換式穩壓器,因其切換雜訊及諧波雜訊集中在固定的切換頻率,將造成很大的電磁干擾。本論文主要介紹如何避免電磁干擾的影響,並對目前常見消除電磁干擾的技術做深入探討。

針對電路系統的干擾源,能有效抑制電磁干擾的方法為展頻調變,此技術是利用對時脈訊號的頻率做定量的調變,使輸出訊號的能量能平均分散到可控制的頻率範圍內,同時可降低各諧波的能量峰值,以達到有效降低整體系統的電磁干擾。

此切換頻率調變的方式採用直接調變壓控制振盪器,可有效的降低晶片複雜度、節省面積及功率消耗。並以台積電 0.25um 1P5M CMOS製程完成切換式穩壓器結合展頻調變以及四相位切換式穩壓器結合展頻調變的設計架構、模擬及製作。工作電壓為2.5V-5V,利用數位類比轉換器將切換頻率調變在500KHz至800KHz,成功的使整個系統在不同工作電壓的電磁干擾降低18dB以上,切換式穩壓器的轉換效率最大為89.55%,整個完整系統晶片面積為1.9*1.318mm2。

PWM converters which are using constant switching frequency and variable duty cycle will increase EMI spectrum at the fundamental switching frequency and its harmonics. This thesis introduces how to avoid the effect of EMI, and confer the common techniques to eliminate EMI.

The Spread spectrum frequency modulation (SSFM) technique is used to reduce the conducted EMI in power converters, and the SSFM distributed the energy of the output signal in the controllable frequency range. And it also can reduce the harmonics peaks in the energy spectrum. The SSFM can effectively to reduce the overall system electromagnetic interference.

The switching frequency modulation is directly transferring voltage controlled oscillator, which can effectively reduce the complexity and save chip area and power consumption. The proposed switching regulator with spread spectrum modulation and the proposed four-phase switching regulator with SSFM was implemented with TSMC 0.25um 1P5M CMOS technology. The supply voltage is 2.5V-5V. A DAC is used to modulate the oscillator's frequency from 500KHz to 800KHz. The chip is successful to reduce more than 18dB EMI in different supply voltage and the max efficiency is up to 89.55%. The total chip area of system is 1.9*1.318mm2.
URI: http://hdl.handle.net/11455/6494
其他識別: U0005-1508201116492900
Appears in Collections:電機工程學系所

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