Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/6849
標題: 利用曝光機台群組管理提升各機台間的疊對匹配性
Improve overlay matching for scanners by Scanner Fleet Management
作者: 陳柏志
Chen, Po-Chih
關鍵字: Photolithography;微影製程;Scanner;Overlay Error;Mix-and-Match;SFM;曝光機;疊對誤差;混合與匹配;曝光機台群組管理
出版社: 電機工程學系所
引用: [1] 簡禎富、施義成、林振銘、陳瑞坤,“ 半導體製程技術與管理”,國立清華大學出版社,2005 [2] 張俊彥、鄭晃忠,“積體電路製程及設備技術手冊”,經濟部技術處,1997 [3] 羅文雄,蔡榮輝,鄭岫盈,劉文超,許渭州,“半導體製造技術”,滄海書局,2003 [4] 龍文安,“半導體奈米技術”,五南圖書出版股份有限公司,2006 [5] 楊桂華,“先進半導體製程良測技術 提升晶片良率的幕後功臣”,工業技術與資訊月刊, 12月號,2010 [6] 許志良,“微影疊對之Mix-and-Match控制”,中原大學機械工程學系碩士論文,2005 [7] D.S. Perloff, “A four-point electrical measurement technique for characterizing mask superposition error on semiconductor wafer”, IEEE Journal of Solid-State Circuits, Vol.13, n4, pp.436-444, 1978 [8] T.F. Hasan, S.U. Katzma, D.S. Perloff, “Automated electrical measurements of registration error in step-and-repeat optical lithography sytems”, IEEE Transaction on electron devices, Vol.27, n12, pp.2304-2312, 1980 [9] D. MacMillen, W.D. Ryden, “Analysis of image field placement deviations of a 5x microlithographic reduction lens”, Proceedings of SPIE: Optical Microlithography-Technology, Vol.334, pp.78-89, 1982 [10] C.K. Peski, “Minimizing pattern registration errors through wafer stepper matching techniques”, Solid State Technology, Vol.25, n5, pp.111-115, 1982 [11] W.H. Arnold, “Image placement differences between 1:1 projection aligners and 10:1 reduction wafer stepper”, Proceedings of SPIE: Optical Microlithography, Vol.394, pp.87-98, 1983 [12] M.A. Brink, C.G.M. de Mol, R.A. George, “Matching performance for multiple wafer steppers using an advanced metrology procedure”, Proceedings of SPIE: Integrated Circuit Metrology, Inspection, and Process Controll II, Vol.921, pp.180-197, 1988 [13] Z.C. Lin and W.J. Wu, “Multiple linear regression analysis of the overlay accuracy model”, IEEE Transaction on Semiconductor Manufacturing, Vol.12, pp.229-237, 1999 [14] J. Pellegrini, J. Stutevant, K. Green, P. Becher, “Exposure field matching of multiple step-and-scan systems to multiple step-and-repeat systems”, IEEE/SEMI Advanced Semiconductor Manufacturing Conference and Workshop, pp.265-271, 1996 [15] P. V. Oorschot, B. Koek, J. van der Spek, E. Stuiver, H. Franken, H. Botter, and B. Reiner, Garreris “Performance of an i-Line Step&Scan system for sub 0.25μm mix and match applications”, Proceedings of SPIE-The International Society for Optical Engineering, Vol.3334, pp.423, 1988 [16] S. DeMoor, J. Brown, J.C. Robinson, C. Simon and T. Colin, “Scanner overlay mix and match matrix generation: capturing all sources of variation”, Proceedings of SPIE-The International Society for Optical Engineering, Vol.5375, pp.66-77, 2004 [17] K. Takuya, T. Manabu, A. Keita, K. Nobuhiro and H. Tatsuhiko, “Mix and Match overlay method by compensating dynamic scan distortion error”, Proceeding of SPIE-The International Society for Optical Engineering, Vol.5379, pp.221-277, 2004 [18] S.H. Chiu , S.H. Yu, M.H. Tung, L.K. Wu, Y.-T. Yeh, J. Manka, C.T. Huang, J. C. Robinson, C.C. Huang, D. Tien, Y. Chen, K. Makino, J.M. Lin, “Improve scanner matching using automated real-time feedback control via scanner match maker (SMM)”, Proceedings of SPIE, Vol.7272-136, 2009 [19] S.H. Chiu, C.L. Lee, S.H. Yu, K.L. Fu, M.H. Tung, P.C. Chen, C.T. Huang, C.C.. Yu, C.C. Huang, J. C. Robinson and D. Tien, “Improved scanner matching using scanner fleet matcher (SFM)”, Proceedings of SPIE, Vol.7638, 76382A, 2010 [20] C.Y. Hsu, “Step-and-Scan Overlay Errors Modeling, Design of Sampling Strategies and the Validation via the Empirical Study”, National Tsing-Hau University, 2004 [21] Canon INC., “FPA-6000 ES6 Fine Pattern Aligner Operation Manual” Rev.02, pp.VIII.1.3-VIII.2.10, 2004 [22] ASML, “TWINSCAN XT:1900Gi Installation Requirements”, pp.22, 2008
摘要: 
由於積體電路設計規格不對的微縮,微影製程各層次之間的疊對性能(Overlay performance)在這幾年已經成為先進半導體廠持續發展的重要因素。而疊對誤差(Overlay error)的主要成分來至於機台與機台之間的疊對匹配(Matching)誤差結果,這樣的疊對匹配誤差通常來至於機台與機台之間或者不同照明系模式之間的疊對差異性所造成。
由於先進元件設計對於疊對性能的需求,迫使晶圓廠必須使用鎖定曝光機台(Scanner dedication)的策略來進行生產,這樣的策略雖然可以確保關鍵層別(Critical layer)的疊對性能,但卻會降低曝光機台群組在生產線派工上的靈活度,也會造成生產排程的瓶頸。假如混合與匹配(Mix-and-Match)的機制可以確實的被使用,除了可以確保關鍵層別的疊對性能,也可以降低機台在生產排程上的瓶頸。
傳統的混合與匹配機制需要花費很多時間,在本研究中我們建立了一個有系統又更精簡化的曝光機台群組管理(Scanner Fleet Management,SFM)機制來提升各機台間的疊對匹配性(Overlay matching)。不需要耗費更多的測試晶圓就可以建立起各曝光機台之間與所有不同照明系模式之間的疊對匹配矩陣(Matching matrix),除了提高了工程人員的效率外,也提升機台之間混合與匹配的疊對能力。依據本研究的驗證結果,在X與Y方向的疊對殘差分別獲得約20.8%以及12.9%的改善,大大的降低了良率損失了風險。

Overlay performance has been a critical factor for photolithography in advanced semiconductor manufacturing for many years. Over time these requirements become more stringent as design rules shrink. A dominant component of the overlay error budget is a result of scanner matching errors, either machine to machine or illumination mode to illumination mode.
Overlay performance requirements of modern device designs have forced chipmakers to follow scanner-dedication strategy. This strategy helps guarantee the required overlay performance. However, it reduces the flexibility of the scanner fleet, the scanners required for dedication become a production bottleneck. If mix-and-match strategy can be used, and still achieve the overlay performance required for the critical layer budgets, these bottlenecks can be avoided or reduced.
Current methods for fleet management are typically very time consuming. In this study, we have to create the advantages of a systematic and simplify methodology by scanner fleet management to improve overlay matching for scanner. No extra wafers are required beyond current practices, and yet a more comprehensive matching matrix between scanner and scanner illumination combinations can be realized. The benefits include a significant saving of engineering time, the ability to quickly identify scanner issues regarding fleet management, and the potential to increase fab mix-and-match capability thereby improving overall equipment effectiveness. We did an experiment by scanner fleet management, the overlay residual-3sigma achieved 20.8% and 12.9% improvement for X and Y, without increasing the risk of yield loss.
URI: http://hdl.handle.net/11455/6849
其他識別: U0005-2008201118092500
Appears in Collections:電機工程學系所

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