Please use this identifier to cite or link to this item:
|標題:||Implementation of 0.18 mu m RFCMOS technology for system-on-a-chip applications||作者:||Hsu, H.M.||關鍵字:||integrated-circuits;rf-cmos;device||Project:||Iee Proceedings-Microwaves Antennas and Propagation||期刊/報告no：:||Iee Proceedings-Microwaves Antennas and Propagation, Volume 153, Issue 6, Page(s) 516-522.||摘要:||
The paper presents a complete portfolio of RF and baseband components by adopting RFCMOS technology for single-chip systems. Using optimised CMOS topology and deep n-well, the performance relates to the f(t) of 60 GHz and f(max) of 53 GHz at 10 mA, an f(t) of 70 GHz and f(max) of 58 GHz at maximum-transconductance bias, and a minimum noise figure of 1.5 dB without ground-shielded signal pad. High quality-factor inductors are obtained using thick copper interconnects; the measurement result demonstrates the corresponding quality factor of 18 at 1.7 nH. The MIM capacitors, as well as accumulation-mode MOS and junction varactors are also optimised for improving quality factor. For the purpose of eliminating inter-block coupling noise penetrating through the substrate, a deep n-well isolation and a p-well guard-ring have been adopted to suppress the substrate noise by 25 dB and 10 dB, respectively.
|Appears in Collections:||期刊論文|
Show full item record
TAIR Related Article
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.