Compact layout of DT-MOS transistor with source-follower subcircuit in 90-nm CMOS technology

Abstract

This letter proposes a compact layout of the Dynamic Threshold-voltage MOS (DT-MOS) transistor using foundry 90-nm CMOS technology. Adopting the subcircuit of source follower, the proposed DT-MOS transistor could be operated at voltage as low as 0.7 V. Measurement results demonstrate the 80 % improvement of current drive capability and the 60% improvement of transconductance compared to traditional devices. This letter demonstrates an excellent device with compact layout for low-voltage operation by using nanometer CMOS technology.