Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/69062
標題: Design of on-chip transformer with various coil widths to achieve minimal metal resistance
作者: Hsu, H.M.
Tseng, C.W.
關鍵字: analytical algorithm;minimum resistance;on-chip transformer;variable;metal width;spiral inductors;rf;inductance;layout;cmos
Project: Ieee Electron Device Letters
期刊/報告no:: Ieee Electron Device Letters, Volume 28, Issue 11, Page(s) 1029-1032.
摘要: 
A layout design algorithm of a variable-width transformer is proposed to minimize metal resistance in this letter. The proposed algorithm can rapidly design metal widths in each coil of a planar transformer for a given chip area. Two on-chip transformers with identical self-inductance are fabricated to verify the proposed algorithm in 90-nm CMOS technology. Measurement results demonstrate the improvement of metal resistance approximates to the value of 11.6%. Results of this study provide an effective algorithm to design a minimal-loss transformer for radio frequency integrated circuit applications.
URI: http://hdl.handle.net/11455/69062
ISSN: 0741-3106
DOI: 10.1109/led.2007.906934
Appears in Collections:期刊論文

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