Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/71321
DC FieldValueLanguage
dc.contributor.authorKang, T.K.en_US
dc.contributor.authorLiu, H.W.en_US
dc.contributor.authorWang, F.H.en_US
dc.contributor.authorLin, C.L.en_US
dc.contributor.authorLiao, T.C.en_US
dc.contributor.authorWu, W.F.en_US
dc.date2011zh_TW
dc.date.accessioned2014-06-11T06:01:11Z-
dc.date.available2014-06-11T06:01:11Z-
dc.identifier.issn0038-1101zh_TW
dc.identifier.urihttp://hdl.handle.net/11455/71321-
dc.description.abstractStacked HfAlO-SiO2 tunnel layers are designed for Pd nanocrystal nonvolatile memories. For the sample with 1.5 nm-HfAlO/3.5 nm-SiO2 tunnel layer, a smaller initial memory window is obtained compared to the sample with 3.5 nm-HfAlO/1.5 nm-SiO2 tunnel layer. Owing to the thermally induced traps in HfAlO-SiO2 films are located at a farther distance from the Si substrate and more effective blocking of charge leakage by asymmetric tunnel barrier, a larger final memory window and better retention characteristic can be obtained for Al/blocking oxide SiO2/Pd NC5/1.5 nm-HfAlO/3.5 nm-SiO2/Si structure. A N-2 plasma treatment can further improve the memory characteristics. Better memory characteristics can be obtained for Pd-nanocrystal-based nonvolatile memory with an adequate thickness ratio of HfAlO to SiO2. (C) 2011 Elsevier Ltd. All rights reserved.en_US
dc.language.isoen_USzh_TW
dc.relationSolid-State Electronicsen_US
dc.relation.ispartofseriesSolid-State Electronics, Volume 61, Issue 1, Page(s) 100-105.en_US
dc.relation.urihttp://dx.doi.org/10.1016/j.sse.2011.02.003en_US
dc.titleImproved characteristics for Pd nanocrystal memory with stacked HfAlO-SiO2 tunnel layeren_US
dc.typeJournal Articlezh_TW
dc.identifier.doi10.1016/j.sse.2011.02.003zh_TW
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
item.openairetypeJournal Article-
item.cerifentitytypePublications-
item.fulltextno fulltext-
item.languageiso639-1en_US-
item.grantfulltextnone-
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