Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/7236
標題: 建立於SOC平台上之IPv4/IPv6封包轉換器的硬體實現
Hardware Implementation of IPv4/IPv6 Packet Translator on an SOC Platform
作者: 郭世宏
Shihong-Guo
關鍵字: IPv4;轉換器;IPv6;Translator;SOC
出版社: 電機工程學系
摘要: 
論文摘要
由於網際網路的快速發展, IPv4已無法滿足今日的規模需求,IPv6因應而生。近年來更由於行動通訊的需求,Mobile Wireless Internet Forum已將IPv6納入其未來架構,潛力無窮。雖然IPv6有很多優點,但因目前大多應用仍以 IPv4為主,因此IPv4/IPv6之間的轉換已經成為網路服務不可或缺的一種機制。
本論文將開發一個以SOC(System On a Chip)為開發平台的IPv4/IPv6快速封包轉換器,為了增加處理速度的需求,傳統以軟體來處理的方式已經漸漸沒辨法滿足大量服務的負載。為了解決這個問題,我們提出一個以硬體來實現的封包處理器,它提供相同的IP服務以及繁雜的IP版本轉換;這個處理器是以硬體描述語言VHDL所實現,並以Xilinx Vertex II Pro FPGA 發展板為測試環境;我們比較在相同的動作流程下硬體與軟體的實際速度上的差異,測試結果硬體的處理時間至少比軟體快上5倍。故要解決新一代的IP協定的發展,此處理器的開發將是一個不錯的解決方案。

Abstract
As the fast growth of the internet network development, the IPv4 has been already unable to meet the scale demand. In order to solve it, the next generation IP protocol of IPv6 has already been proposed. In recent years, because the mobile communication has a strong demand in recent years, Mobile Wireless Internet Forum has already included IPv6 in its structure in the future, and the potentiality is infinite. The IPv6 has a lot of advantages, but mostly application still rely mainly on IPv4 at present. Thus the conversion between IPv4/IPv6 has already become a kind of indispensable mechanism of network service.
In this thesis, due to increase demand of processing speed, we develop the fast packet translator based on SOC (System On a Chip) system. Traditional software-based Networking devices may not be sufficient to afford the processing load imposed by the services. In order to solve this problem, we propose a packet processor implemented with hardware that provides common IP services and mixed-version translations. This processor is designed using VHDL and is tested in a Xilinx Vertex II Pro FPGA development board. We compare the performance between the hardware and software implementation. The test result shows that the processing time of hardware implementation will be at least five times faster than that of software implementation. For the sake of the development of the next generation protocol of IPv6, the development of this processor will be a better solution.
URI: http://hdl.handle.net/11455/7236
Appears in Collections:電機工程學系所

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