Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/7409
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dc.contributor.advisor楊谷章zh_TW
dc.contributor.advisorGuu-Chang Yangen_US
dc.contributor.author張永賢zh_TW
dc.contributor.authorChang, Yung-Hsienen_US
dc.date2001zh_TW
dc.date.accessioned2014-06-06T06:40:01Z-
dc.date.available2014-06-06T06:40:01Z-
dc.identifier.urihttp://hdl.handle.net/11455/7409-
dc.description.abstract由於現代人資訊需求量很高,除了資料傳輸、檔案傳送之外,甚者聲音、影像等即時傳送。然而IEEE 802.11所訂定的標準中僅提供1和2Mbps的傳輸速率,此傳輸速率已無法滿足現代人的需求。所以在1999年九月IEEE 802.11b標準的通過,延續直接序列展頻技術,採用新的調變方式─互補碼調變,額外地增加兩種較高的傳輸速率,分別是5.5和11Mbps。 在本論文中,除了針對高速無線區域網路之基頻處理器設計一包含傳送端及接收端之完整架構外,並在互補碼解調之相關器上提出一新的架構。此外,一些無線區域網路之關鍵技術,包含:通道特性之模擬、展頻技術、載波回復技術及對抗衰減通道技術等,在本論文中皆有說明及比較。 至於互補碼解調之相關器,藉由使用吾人所提出之兩階相關性運算,與傳統相關器比較,可降低75%之複雜度,而功率則可節省84.375%。zh_TW
dc.description.abstractIn the original IEEE 802.11 standard two data rate, 1 and 2Mbps, are provided. However, the data rates are too slow to support most general business requirements. Recognizing the critical need to support higher data transmission rates, the IEEE ratified the 802.11b standard for transmissions of up to 11Mbps by using complementary code keying (CCK) in September 1999. In this thesis, the design of a high-speed wireless LAN baseband processor and a new architecture for correlator of CCK demodulation are proposed. Beside, some important technologies for wireless LAN including channel characteristic, spread spectrum, carrier recovery, and anti-fading are appeared and explained in this paper. By using the new architecture for correlator of CCK demodulation, the complexity of correlator could be reduced effectively.en_US
dc.description.tableofcontents第一章 緒論………………………………………………………….1 1.1 背景………………………………………………………….1 1.2 介質存取控制層簡介……………………………………….4 1.3 章節簡介…………………………………………………….5 第二章 無線區域網路之關鍵技術 … … … …………………….7 2.1 通道特性…………………………………………………….7 2.1.1 時變性多路徑通道…………………………………..7 2.1.2 通道模型…………………………………………… .9 2.2 展頻技術…………………………………………………..12 2.2.1 直接序列展頻系統………………………………….14 2.2.2 跳頻系統…………………………………………….16 2.3 載波回復迴路……………………………………………..17 2.3.1 數位柯斯塔迴路…………………………………….19 2.3.2 鎖相迴路之階數…………………………………….21 2.4 對抗衰減通道之技術……………………………………..22 2.4.1 RAKE接收機 … …………………………………….22 2.4.2 等化器……………………………………………….24 第三章 高速無線區域網路之調變技術 … … … … … ………28 3.1 差分二相位移鍵…………………………………………..28 3.2 差分四相位移鍵…………………………………………..30 3.3 巴克序列…………………………………………………..34 3.4 互補碼調變………………………………………………..35 3.4.1 IEEE 802.11b之互補碼調變……………………….35 3.4.2 互補碼調變之向下相容…………………………….38 3.4.3 互補碼調變之傳送端架構………………………….38 3.4.4 互補碼調變之接收端架構………………………….41 3.5 新解調變架構:兩階相關性運算………………………..44 3.5.1 互補碼之不完美正交性…………………………….44 3.5.2 互補碼之分組……………………………………….44 3.5.3 兩階相關性運算…………………………………….46 3.6 模擬結果…………………………………………………..56 第四章 系統架構…………………………………………………..59 4.1 傳送端架構………………………………………………..59 4.2 接收端架構………………………………………………..62 4.2.1 引導程序/標頭階段之設計…………………………64 4.2.2 載波回復迴路……………………………………….68 4.2.3 高速資料階段之設計……………………………….69 第五章 結論…………………………………………………………72zh_TW
dc.language.isoen_USzh_TW
dc.publisher電機工程學系zh_TW
dc.subject無線區域網路zh_TW
dc.subjectWireless LANen_US
dc.subject互補碼調變zh_TW
dc.subjectCCKen_US
dc.title高速無線區域網路之架構zh_TW
dc.titleArchitecture for High Speed Wireless LANen_US
dc.typeThesis and Dissertationzh_TW
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
item.openairetypeThesis and Dissertation-
item.cerifentitytypePublications-
item.fulltextno fulltext-
item.languageiso639-1en_US-
item.grantfulltextnone-
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