Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/7458
DC FieldValueLanguage
dc.contributor林維亮zh_TW
dc.contributor戴亞翔zh_TW
dc.contributor.advisor汪芳興zh_TW
dc.contributor.author林致穎zh_TW
dc.contributor.authorLin, Chih-Yingen_US
dc.contributor.other中興大學zh_TW
dc.date2008zh_TW
dc.date.accessioned2014-06-06T06:40:04Z-
dc.date.available2014-06-06T06:40:04Z-
dc.identifierU0005-1107200720123500zh_TW
dc.identifier.citation[1] 徐同璇,“應用於主動式液晶顯示器之低偏移電壓緩衝放大器”, 國立中興大學電機工程學系碩士論文, 民國95年7月. [2] 張廷宇,“低溫多晶矽薄膜電晶體液晶顯示器週邊電路設計”, 國立中興大學電機工程學系碩士論文, 民國95年7月. [3] David A. Johns, Ken Martin, “Analog Integrated Circuit Design”, John Wiley & Sons, 1997. [4] Allen, 羅正忠,“CMOS類比電路設計第二版”, 台北圖書,民國94年5月. [5] “Low Temperature p-Si (LTPS) TFTs”, DisplaySearch, May ΄99. [6] 戴亞翔,“TFT-LCD 面板的驅動與設計”, 五南圖書, 民國95年4月. [7] Gross, Jr. et al., “Resistor String With Equal Resistance Resistor”, United States Patent, No. 5,534,862, 1996. [8] Bruce, J.W., “Nyquist Rate Digital-to-Analog Converter Architectures”, IEEE Potentials, Vol. 20, pp. 24-28, 2001. [9] Andre Abrial, Jacky Bouvier, Jean-Michel Fournier, Patrice Senn, and Michel Veillard, “A 27-MHz Digital-to-Analog Video Processor”, IEEE Journal of Solid-State Circuits, Vol. 23, No. 6, pp. 1358-1369, 1988. [10] Lei Wang, Yasunori Fukatsu, and Kenzo Watanabe, “A CMOS R-2R Ladder Digital-to-Analog Converter and Its Characterization”, IEEE Instrumentation and Measurement Technology Conference, pp. 1026-1031, 2001. [11] S. Seki, T. Saito, H. I. Fujishiro, S. Nishi, and Y. Sano, “An 8Bit 1GHz DAC using 0.5u Inverted HEMTs”, IEEE International Electron Device Meeting, pp. 770-773, 1988. [12] Won-Chul Shin, Seung-Woo Lee, Hoon-Ju Chung and Chul-Hi Han“ Design of A 1’*1’, 512*512 Poly-Si TFT-LCD with Integrated 8-bit Parallel-Serial Digital Data Driver,” Journal of Information Display, Vol.2, No.2, pp. 1-6, June 2001. [13] B. D. Choi, H. Jang, O. K. Kwon, H. G. Kim, and M. J. Soh, “Design of Poly-Si TFT-LCD Panel with Integrated Driver Circuits for an HDTV/XGA Projection System”, IEEE Transactions on Consumer Electronics, Vol. 46, pp. 95-104, 2000. [14] Edwards, M. J., “Poly-Si Drive Circuits for Liquid Crystal Displays”, IEE Colloquium on Poly-Si Devices and Applications, pp. 109- 112, 1993. [15] C. S. Tan, W. T. Sun, S. H. Lu, C. H. Kuo, S. H. Yeh, I. T. Chang, C. C. Chen, Jargon Lee, and C. S. Yang, “A Fully Integrated Poly-Si TFT- LCD Adopting a Novel 6-Bit Source Driver and a Novel DC-DC Converter Circuit”, SID Tech. Dig., pp. 1456-1459, 2004. [16] M. D. Ker, C. K. Deng, and J. L. Huang, “On-Panel Design Technique of Threshold Voltage Compensation for Output Buffer in LTPS Technology”, SID Tech. Dig., pp. 288-291, 2005. [17] S. H. Jung, J. H. Park, C. W. Han, and M. K. Han, “New Source Follower Type Analog Buffers Using Poly-Si TFTs for Active Matrix Displays”, SID Tech. Dig., pp. 1452-1455, 2004. [18] Y. S. Yoo, J. Y. Choi, H. S. Shim, and O. K. Kwon, “A High Accurate Analog Buffer Circuit using Low Temperature Poly-Si TFT”, SID Tech. Dig., pp. 1460-1463, 2004. [19] C. C. Pai, and Y. H. Tai, “A New Analogue Buffer Using Poly-Si TFTs with Deviation Less Dependent on the Gray Level for Active Matrix Displays”, SID Tech. Dig., pp. 438-441, 2005. [20] H. J. Chung, S. W. Lee, and C. H. Han, “Poly-Si TFT push-pull analogue buffer for integrated data drivers of poly-Si TFT-LCDs”, IEEE Electronics Letters, Vol. 37, No. 17, pp. 1093-1095, 2001. [21] Y. H. Tai, C. C. Pai, B. T. Chen, and H. C. Cheng, “A Source-Follower Type Analog Buffer Using Poly-Si TFTs With Large Design Windows”, IEEE Electron Device Letters, Vol. 26, No. 11, pp. 811-813, 2005. [22] C. D. Yoo, J. Kim, and K. L. Lee, “Threshold Voltage and Mobility Mismatch Compensated Analogue Buffer for Driver-Integrated Poly-Si TFT LCDs”, IEEE Electronics Letters, Vol. 41, No. 2, pp. 65-66, 2005.zh_TW
dc.identifier.urihttp://hdl.handle.net/11455/7458-
dc.description.abstract運用低溫多晶矽技術將週邊電路整合至玻璃基板上之系統面板已經被發展出來,它可以取代傳統的控制電路和驅動電路,降低液晶模組的價格且提高電路產品的可靠性。在這些週邊電路中,數位類比轉換器和輸出緩衝器對於加強液晶顯示器的效能是一個很重要的部份,因為它負責把數位訊號轉為類比訊號來控制畫素的灰階。 首先,我們提出一個可以用於高解析度液晶顯示器且利用低溫多晶矽技術製造的八位元切換電阻式數位類比轉換器,我們使用電阻分壓原理和快速切換並聯電阻的技術來達到降低晶片的面積和功率消耗。量測結果顯示,在6伏特的電源電壓下,上升時間和下降時間分別為1.16和1.22微秒,最大之微分非線性誤差和積分非線性誤差分別約為0.3和0.6最小輸出電壓位階(LSB)。 其次,一種可以運用於積體化資料驅動電路的新穎互補式電流鏡型類比緩衝器被提出。此類比緩衝器利用P型和N型電流鏡來增強電壓訊號以及達到最大的電壓擺幅,並且不需要使用額外的電容或外加控制訊號來控制,可以達到縮減面積的目的。在10伏特的電源電壓下,可以在1至9伏特之間擁有良好的線性度,偏移電壓在中間灰階值時可以小於65.1毫伏特。 新發展出來的切換電阻式數位類比轉換器和互補電流鏡型類比緩衝器將有機會可以應用於低溫多晶矽技術之系統面板上。zh_TW
dc.description.abstract“System on panel (SOP)” products, which integrated peripheral circuits on glass, have been developed by using low-temperature polycrystalline silicon (LTPS) technology. It may eliminate control ICs and driver ICs, reduce the cost of LCD modules, and enhance reliability of products. Among the peripheral circuits, digital-to-analog converters (DACs) and output buffers are important to performance of LCDs because they transform digital signals into analog voltages for controlling gray levels of pixels. First, we represent a novel 8-bit switched-resistor DAC (SR-DAC) based on LTPS technology for high-resolution TFT-LCDs. Reduced chip area and power consumption have been achieved by the voltage division principle and fast switching parallel connection resistors. The measurement results of the rising time and the falling time with 6-V power are 1.16 and 1.22 μsec. The maximum DNL and INL are about 0.3 and 0.6 LSB. Second, a novel complementary current mirror (CCM) type analog buffer is presented for the integrated data drivers. The proposed analog buffer makes use of a p-type and an n-type current-mirrors to amplify the voltage and to achieve large voltage swing. The proposed buffer does not need capacitors and external control signals and features compact size. It has a good linearity from 1-9 V of input voltages with a 10-V power. The offset voltages are within 65.1 mV in middle gray levels. The developed SR-DAC and analog buffer have potential to be applied for SOP products fabricated by LTPS technology.en_US
dc.description.tableofcontentsAcknowledgment ...................................... i Chinese Abstract .................................... ii English Abstract .................................... iii Contents ............................................ iv Figures Caption ..................................... vii Tables List ......................................... x Chapter 1 Introduction ............................. 1 1.1 Motivation ..................................... 1 1.2 Thesis Organization ............................ 1 1.3 DAC Architectures and Parameters ............... 1 1.3.1 Ideal converter and signed codes ............. 2 1.3.2 Performance limitation parameters ............ 4 1.3.3 Architecture of DAC .......................... 7 1.4 Low Temperature Polycrystalline Silicon ........ 8 1.4.1 Introduction ................................. 8 1.4.2 Mobility ..................................... 8 1.4.3 Bandwidth .................................... 9 1.4.4 Leakage current .............................. 9 1.4.5 Threshold voltage ............................ 10 Chapter 2 Switched-Resistor DACs ................... 11 2.1 Introduction ................................... 11 2.2 Prior Literatures .............................. 11 2.2.1 Decoder type DAC ............................. 15 2.2.2 Binary-weighted type DAC ..................... 18 2.2.3 Thermometer-code type DAC .................... 19 2.2.4 Hybrid type .................................. 21 2.3 Proposed Switched-Resistor DAC ................. 21 2.3.1 Based concept ................................ 21 2.3.2 Advanced architecture ........................ 24 2.4 Simulation Results ............................. 27 2.4.1 Simulation with loads ........................ 27 2.4.2 Mismatch effect on resistance ................ 29 2.4.3 Comparison of DACs ........................... 32 2.5 Layout ......................................... 33 2.6 Measurement Results ............................ 34 2.6.1 Die photograph ............................... 34 2.6.2 Measurement setup ............................ 35 2.6.3 Measurement results .......................... 35 2.7 Summaries ...................................... 41 Chapter 3 Complementary Current-Mirror Type Analog Buffer .............................................. 42 3.1 Introduction ................................... 42 3.2 Prior Literatures .............................. 43 3.2.1 Feedback type analog buffer .................. 43 3.2.2 Push-pull analog buffer ...................... 44 3.2.3 Threshold-voltage-compensation type buffer ... 45 3.2.4 Current-driving type analog buffer ........... 46 3.3 Proposed Buffer Circuit ........................ 47 3.3.1 Proposed complementary current mirror type analog buffer .............................................. 47 3.3.2 Simulation results ........................... 49 3.4 Summaries ...................................... 54 Chapter 4 Conclusions .............................. 55 4.1 Conclusions .................................... 55 4.2 Future Work .................................... 55 References .......................................... 57en_US
dc.language.isoen_USzh_TW
dc.publisher電機工程學系所zh_TW
dc.relation.urihttp://www.airitilibrary.com/Publication/alDetailedMesh1?DocID=U0005-1107200720123500en_US
dc.subjectParallel-Connection Resistoren_US
dc.subject並聯電阻zh_TW
dc.subjectDigital-to-Analog Converteren_US
dc.subjectCurrent Mirroren_US
dc.subjectAnalog Bufferen_US
dc.subject數位類比轉換器zh_TW
dc.subject電流鏡zh_TW
dc.subject類比緩衝器zh_TW
dc.title應用於低溫多晶矽平面顯示器之數位類比轉換器zh_TW
dc.titleDigital Analog Converter for Low-Temperature Polycrystalline Silicon Flat Panel Displaysen_US
dc.typeThesis and Dissertationzh_TW
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
item.openairetypeThesis and Dissertation-
item.cerifentitytypePublications-
item.fulltextno fulltext-
item.languageiso639-1en_US-
item.grantfulltextnone-
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