Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/7752
標題: 一伏特以下之低功率CMOS能隙參考電壓電路設計
Sub-1V CMOS bandgap reference circuit design for low power applications
作者: 梁朝睿
liang, chao-jui
關鍵字: 能隙參考電壓;低功率
出版社: 電機工程學系
摘要: 
本論文提出了一個可操作在1V以下的CMOS能隙參考電路,在一般的能隙參考電路中,輸出電壓是雙載子電晶體中基極-射極接面電壓VBE與臨界電壓VT (KT/q) 乘以一個常數的總和,因此輸出電壓大約為1.25V,而這輸出電壓限制了1V以下的操作。所以在本文所提出的能隙參考電路中,將基極-射極接面電壓分壓以降低能隙參考電壓的輸出 (Vref = 170mV)。而電路在室溫時當操作電壓從1V增加到3V時,輸出電壓僅有1.125mV/V的變化率而且功率消耗也只有0.24μW;而當溫度從-20增加到100°C時,輸出也只有1.3mV的變化。此電路已使用0.18μm的CMOS製程下線。

This thesis proposes a CMOS band-gap reference (BGR) circuit, which can successfully be operated with sub-1-V supply voltage. For conventional BGR circuit, the output voltage Vref is the sum of the BJT of the base-emitter junction voltage VBE and the thermal voltage VT of KT/q multiplied by a constant. Therefore, Vref is about 1.25V, which limits a low supply voltage operation below 1V. In the proposed BGR circuit, the base-emitter junction voltage VBE has been divided, so the output Vref can be reduced (Vref = 170mV). The circuit with power consumption of 2.4μW at room temperature achieves the reference voltage variation of 1.125mV/V for supply voltage from 1V to 3V and about 1.3mV temperature variation in the range from -20 to 100°C. This circuit has been fabricated in 0.18μm CMOS process.
URI: http://hdl.handle.net/11455/7752
Appears in Collections:電機工程學系所

Show full item record
 

Google ScholarTM

Check


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.