Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/7953
標題: 氫化非晶矽薄膜電晶體在各種偏壓應力下之不穩定性研究
Study on the Instability of Hydrogenated Amorphous Silicon Thin Film Transistors under Various Bias Stress
作者: 蔡鈞諺
Tsai, Jiun-Yan
關鍵字: a-Si:H TFTs;氫化非晶矽薄膜電晶體;direct current (DC) bias stress;alternating current (AC) stress;asynchronous AC signals stress;直流偏壓應力測試;交流偏壓應力測試;非同步交流訊號
出版社: 電機工程學系所
引用: [1] R.C. Chittick, J. H. Alexander, and H. F. Sterling, “The preparation and properties of amorphous silicon,” J. Electrochem. Soc., vol. 116, pp.77, 1969. [2] P. G. Le Comber and W. E. Spear, “Electronic transport in amorphous silicon films,” Phys. Rev. Lett., vol. 25, no.8, pp.509-511, Aug. 1970. [3] W. E. Spear, R. J. Loveland, and A. Al-Sharbaty, “The temperature dependence of photoconductivity in a-Si,” J. Non-Cryst. Solids, vol. 15, pp.410-422, 1974. [4] R. A. Street and M. J. Thompson, “Electronic States at the Hydrogenated Amorphous Silicon/Silicon Nitride Interface,” Appl. Phys. Lett, vol.45, pp.769-771, 1984. [5] K. Hiranaka, T. Yoshimura, and T. Yamaguchi, “Effect of the Deposition Sequence on Amorphous Silicon Thin Film Transistors,” Jpn. J. Appl. Phys. 28, no.11, pp.2197-2200, 1989. [6] H. Uchida, K. Takechi, S. Nishida and S. Kaneko, “High-Mobility and High- Stability a-Si:H Thin Film Transistors With Smooth SiNx/a-Si Interface,” Jpn. J. Appl. Phys. 30, pp.3691-3694, 1991. [7] L. L. Kazmerski, “Polycrystalline and Amorphous Silicon Thin Film and Devices,” Academic Press, 1980. [8] D. L. Staebler and C. R. Wronski, “Optically induced conductivity changes in discharge-produced hydrogenated amorphous silicon,” J. Appl. Phys. 51, pp.3262-3268, 1980. [9] M. Stutzmann, W. B. Jackson, and C. C. Tsai, “Kinetics of the Staebler-Wronski effect in hydrogenated amorphous silicon,” Appl. Phys. Lett.45(10), vol.15, pp.1075-1077, 1984. [10] B. Pivac, I. Kovacevic, I. Zulim, V. Gradisnik, “Effect of Light Soaking on Amorphous Silicon,” IEEE, Photovoltaic Specialists Conference, pp.884-887, 2000. [11] C. Y. Huang, T. H. Teng, J. W. Tsai, and H. C. Cheng, “The Instability mechanisms of Hydrogenated amorphous Silicon Thin Film Transistors under AC Bias Stress,” Jpn. J. Appl. Phys. Vol.39 (2000), pp.3867-3871 Part1, No. 7A, July 2000. [12] C. S. Chiang, J. Kanicki and K. Takechi, “Electrical Instability of Hydrogenated Amorphous Silicon Thin-Film Transistors for Active-Matrix Liquid-Crystal Displays,” Jpn. J. Appl. Phys. Vol.37 (1998), pp.4704-4710 Part 1, No. 9A, September 1998. [13] M. J. Powell, S. C. Deane and W. I. Milne, “Bias-stress-induced creation and removal of dangling-bond states in amorphous silicon thin-film transistors,” Appl. Phys. Lett. 60 (2), 13 January 1992. [14] C. Y. Huang, J. W. Tsai, T. H. Teng, C. J. Yang and H. C. Cheng, “Turnaround Phenomenon of Threshold Voltage Shifts in Amorphous Silicon Thin Film Transistors under Negative Bias Stress,” Jpn. J. Appl. Phys. Vol. 39 (2000) pp. 5763-5766 Part 1, No. 10, October 2000. [15] K. S. Karim, A. Nathan, M. Hack, and W. I. Milne, “Drain-Bias Dependence of Threshold Voltage Stability of Amorphous Silicon TFTs,” IEEE Electron letters, Vol. 25, No. 4, April 2004. [16] C. Y. Huang, T. H. Teng, C. J. Yang, C. H. Tseng and H. C. Cheng, “Effect of Temperature and Illumination on the Instability of a-Si:H Thin-Film Transistors under AC Gate Bias Stress,” Jpn. J. Appl. Phys. vol. 40 (2001) pp. L316-L318. [17]M. J. Powell, “Charge trapping instabilities in amorphous silicon-silicon nitride thin-film transistor,” Appl. Phys. Lett. 43, pp597, Jul. 1983. [18]A. R. Hepburn, J. M. Marshall, C. Main, M. J. Powell and C. van Berkel,“Metastable Defects in Amorphous-Silicon Thin-Film Transistors,”Phys, Rev. Lett. 56, pp.2215-2218, May, 1986.
摘要: 
氫化非晶矽薄膜電晶體已經廣泛的應用在平面顯示器中,作為畫素開關的重要元件。然而在更先進的應用中,氫化非晶矽薄膜電晶體會進一步作為驅動元件與顯示器周邊電路做整合,和作為畫素開關相比,其主要不同的地方在於作為驅動元件會同時受到各種不同的閘極和汲極偏壓的作用。在本篇論文中,我們在氫化非晶矽薄膜電晶體上給予各種不同的偏壓應力測試來探討其電性不穩定性。

在直流偏壓應力測試中,我們先探討在閘極端施加不同電壓下電晶體電性退化情形。我們發現隨著閘極電壓越大,電晶體之電性衰退越嚴重。另一方面,我們在固定閘極電壓的情形下,逐漸增加汲極端電壓,在這種條件下,我們發現電性劣化的情形會隨著汲極電壓的增加而先降低再升高。

在交流偏壓應力測試中,我們先以閘極給予交流訊號,汲極給予直流偏壓的情形下,針對閘極的頻率、工作週期、震盪範圍等設計不同的實驗來探討電晶體電性衰退的情形。當閘極端操作在不同的工作頻率時,我們發現臨界電壓偏移量不受閘極所給的偏壓頻率的不同而有所差異。然而當汲極端操作在固定的直流偏壓下,我們分別給予閘極端不同工作周期的交流訊號來探討工作週期的變化對於薄膜電晶體電性的影響,我們發現當閘極交流訊號的工作周期越小,則臨界電壓往負方向偏移量會越大。當我們在汲極端給予不同的直流偏壓且變化閘極端交流訊號在相同振幅下的震盪起始點,我們發現當閘極端交流訊號的震盪起始點在越負的電壓準位時,則臨界電壓偏移的趨勢往負的方向偏移的情形會越早發生。

最後,我們在閘極和汲極都給予交流訊號的情形下,來探討在非同步交流訊號下電晶體之不穩定性分析。我們發現當閘極和汲極間的交流訊號一旦非同步,則電晶體之電性衰退的程度會增大。

Hydrogenated amorphous silicon thin-film transistors (a-Si:H TFTs) have been widely used as switch devices of pixel in flat panel displays. However, for the advanced application, a-Si:H TFTs are used as driving devices and integrated with the display circuits. In contrast to the a-Si:H TFTs used as switch devices of pixel, the main difference is that it would be operated by various bias on the gate and drain electrodes simultaneously when the a-Si:H TFTs used as driving devices. In this thesis, we try to discuss the instability of a-Si:H TFTs under various bias stress.

For direct current (DC) bias stress, we apply the positive bias on gate electrode of the TFTs to investigate the degradation behavior. We find that the higher stressing voltage levels are, the larger damage on TFTs will have. In addition, we fix the gate stressing voltage and change the drain voltage to investigate the instability of TFTs. From these conditions of stress, we find that the tendency of degradation will decrease at first and then increases with the increasing of drain voltage levels.

For the alternating current (AC) stress, we apply AC bias on the gate electrode and DC bias on the drain electrode individually to discuss the degradation behavior of TFTs. In this situation, we focus on the AC signal of gate by changing signal frequency, duty ratio, and the amplitude of stressing voltage. We find that the degradation of TFTs is independent on frequency when we apply the positive AC bias stress on the gate electrode. To study the relationship between the degradation and the duty ratio of the gate AC bias stress, we apply constant voltage on the drain electrode, and find that the less duty ratio of the gate AC signals is the more negative direction threshold voltage will shift to. For the change of the amplitude of stressing voltage, we can see that when the amplitude of the AC voltage in the gate is more negative and the drain voltage is higher, the threshold voltage will shift to more negative direction.

Finally, we apply both AC signals on the gate and drain terminal to discuss the instability of TFTs under asynchronous AC signals stress, and we find that if the AC signals between the gate and drain electrode are asynchronous, it will cause the larger damage on TFTs.
URI: http://hdl.handle.net/11455/7953
其他識別: U0005-1208200814230700
Appears in Collections:電機工程學系所

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