Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/8035
標題: Wimax系統同步技術之FPGA實現
FPGA Implementation of Synchronization Technology for Wimax System
作者: 余宗翰
Yu, Tsung-Han
關鍵字: 全球互通微波存取、同步、可規劃之邏輯陣列;Wimax、Synchronization、FPGA
出版社: 電機工程學系所
引用: [1] IEEE Std 802.16-2004 (Revision of IEEE Std 802.16-2001),"IEEE Standard for Local and metropolitan area networks Part 16 : Air Interface for Fixed Broadband Wireless Access Systems" 3 Park Avenue, New York,NY 10016- 5997,USA [2] Xilinx Web URL: http://www.xilinx.com/ [3] John Terry and Juha Heiskala,"OFDM wireless LANsa theoretical and practical guide",Indianapolis,Ind. Sams,pp.49-83,c2002. [4] Marc Engels,"Wireless OFDM system show to make them work?",Boston:Kluwer Academic Publishers,pp.95-112,c2002. [5] J.J.Van de Beek, M.Sandell and P.O.Borjesson,"ML Estimation of Time and Frequency Offset in OFDM Systems",IEEE Transactions on Signal Processing,pp.1800-1805,July 1997 [6] Meng Wu and Wei-Ping Zhu,"A preamble-aided symbol and frequency synchronization scheme for OFDM systems",IEEE International Symposium on Circuits and Systems,pp.2627-2630 Vol.3,May 2005 [7] Miaoudakis A,Koukourgiannis A and Kalivas G,"Carrier Frequency Offset Estimation and Correction for Hiperlan/2 WLANs"IEEE Computers and Communications,pp.693-698 ,July 2002 [8] SS Das,RV Rajakumar,MI Rahman,A Pal,FHP Fitzek,"Low Complexity Residual Phase Tracking Algorithm for OFDM-based WLAN Systems",CSNDSP Symposium,2004 [9] H.CWang,"FPGA Implementation of Baseband Receiver for HIPERMAN System",NCHU,Master Thesis,2007 [10] L.J Chang,"Design and FPGA Implementation of DVB-T Baseband Receiver",NCHU,Master Thesis,2007 [11] C.H Su,"Implementation of OFDM Processing and Synchronization for WiMax Receiver",NTHU,Master Thesis,2005 [12] Stefan Johansson,Martin Nilsson,Peter Nilsson,"An OFDM Timing Synchronization ASIC",IEEE Transactions on Electronics,Circuits and Systems,pp.324-327,Dec.2000 [13] Stefan Johmsson,Peter Nilsson and Mats Torkelson,"Implementation of an OFDM Synchronization Algorithm",IEEEMidwest Symposium on Circuits and Systems,pp.228-231 vol.1,Aug 1999 [14] W.M Chiang,"Design and Implementation of a WiMAX Baseband Processor",NTHU,Master Thesis,2005 [15] H.Y Lung,"Design and Implementation of IEEE 802.16 OFDMA Baseband Transceiver",NCTU,Master Thesis,2006 [16] F.J.Lopez-Martinez,"Hardware Implementation of a Correlation-based Synchronization Algorithm for Wireless OFDM",IEEE 18th International Symposium on Personal Indoor and Mobile Radio Communications,Sept 2007 [17] Taekyu Kim,Sangyeon Parkt,Seongbong Leet and Sin-Chong Park,"Hardware Design of CP Length Detector for the WirelessMAN-OFDM System",International Symposium on Intelligent Signal Processing and Communications,pp.474-476,Dec 2006 [18] Ray Andraka,"A survey of CORDIC algorithms for FPGA based computers",ACM/SIGDA sixth international symposium on Field programmable gate arrays,pp.191-200,March 1998 [19] H.H Wu,"The Implementation of Channel Estimation and Phase Tracking for the IEEE 802.11a Receiver",CCU,Master Thesis,2004 [20] Kim Taekyu and Park Sin-Chong,"Arctangent Processor Design for the Frequency Offset Estimation of IEEE 802.16DWirelessman-OFDMSystem",IEEE Workshop on Signal Processing Systems,pp.199-203,Oct 2007
摘要: 
WIMAX(Worldwide Interoperability for Microwave Access) 的縮寫,一般中譯為「全球互通微波存取」),是一種新興無線寬頻傳輸技術。在WIMAX 系統由三個部份組成,包括通道編碼、調變和正交分頻多工。然而一個正交分頻多工對於會產生大量載波間干擾的時間或頻率偏移是相當敏感的,造成系統效能大幅下降。在本論文中,我們以硬體描述語言Verilog HDL 實現同步系統,並將以建構好的物件燒錄到Vertex-4的FPGA開發版上,並且量測它的效能。

Wimax,the abbreviation of "World Interoperability for Microwave Access", is an emerging technique of wireless communication. In Wimax system, it is composed of three parts, including channel coding, modulation, and orthogonal frequency division multiplexing (OFDM) system. However an OFDM system is very sensitive synchronization and a small frequency or timing offset may cause a large inter-carrier interference (ICI), lead to dramatic degradation in the system. In the thesis, we implement the synchronization system with Verilog HDL. The result model will download to Xilinx Vertex-4 FPGA development board and evaluate its performance.
URI: http://hdl.handle.net/11455/8035
其他識別: U0005-1407200817242400
Appears in Collections:電機工程學系所

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