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Implementation of the 3GPP-LTE Turbo Encoder
|關鍵字:||3GPP;渦輪碼;LTE;Turbo Encoder;QPP;MAP;Interleaver;交錯器;二次方程式排列;最大事後機率解碼||出版社:||電機工程學系所||引用:|| 3GPP, “Technical Specification Group Radio Access Network; Evolved Universal Terrestrial Radio Access (E-UTRA); Multiplexing and Channel Coding,” Release 8, 3GPP TS 36.212 v8.3.0, May 2008.  C. Berrou and A. Glavieux, “Near optimum error correcting coding and decoding: turbo-codes,” IEEE Trans. Commun., vol. 44, no. 10, Oct. 1996.  A. J. Viterbi, “Error bounds for convolutional codes and an asymptotically optimum decoding algorithm,” IEEE Transactions on Information Theory, vol. IT-13, pp. 260-269, Apr. 1967.  陳後守, 邱茂清, 王忠炫, 吳昭明, “錯誤更正碼 (Error Correcting Codes),” 大放異彩書局, 中華民國九十六年六月。  C. Berrou, A. Glavieux, and P. Thitimajshima, “Near Shannon limit error-correcting coding and decoding: Turbo Codes,” in Proc. IEEE Int. Conf. Commun., Geneva, Switzerland, pp. 1064-1070, May 1993.  P. C. Massey and D. J. Costello Jr., “New developments in asymmetric turbo codes,” in Proc. 2nd Int. Symp. Turbo Codes, Brest, France, pp. 93-100, Sept. 2000.  M.-N. Tsou, “Interleaver Design for Turbo Codes in WCDMA Systems,” College of electrical engineering and computer science ,National Chiao Tung University, June 2001.  J.-K. Chang, “Study on the implementation of Turbo Code for 3GPP,” Department of Electrical and Control Engineering, National Chiao Tung University, June 2002.  L. R. Bahl, J. Cocke, F. Jelinek, and J. Raviv, “Optimal decoding of linear codes for minimizing symbol error rate,” IEEE Trans. Inform. Theory, vol. 20, pp. 284-287, Mar. 1974.  S. Dolinar and D. Divsalar, “Weight distributions for turbo codes using random and non-random permutations,” TDA Progr. Rep. 42-122 , Jet Propulsion Lab., Pasadena, CA, pp. 56-65, Aug. 1995.  C. Heegard and S. B. Wicker, “Turbo Coding,” Boston: Kluwer Academic Publishers, 1999.  R. Asghar and D. liu, “Dual Standard Re-configurable Hardware Interleaver for Turbo Decoding,” in Wireless Pervasive Computing, IEEE 3rd International Symposium, pp. 768-772, May 2008.  Xilinx, “3GPP LTE Turbo Encoder v2.0,” Logic Core Product Specification , DS701 , pp. 1-12 , Sept. 2008.  O. Y. Takeshita and D. J. Costello, Jr., “New deterministic interleaver designs for turbo codes,” IEEE Trans. on Information Theory, vol. 46, no. 6, pp. 1988-2006, Sept. 2000.  A. Nimbalker, Y. Blankenship, B. Classon , T. K. Blankenship, ”ARP and QPP Interleavers for LTE Turbo Coding,” IEEE Wireless Communications and Networking Conference, pp.1032-1037, April 2008.  3GPP, “UTRA-UTRAN Long Term Evolution (LTE) and 3GPP System Architecture Evolution (SAE),” pp. 1-8, May 2008.  C. E. Shannon, “A mathematical theory of communication,“ Bell Syst. Tech. J., vol. 27, pp. 379-423, July 1948  S. Benedetto and G. Montorsi, “Design of parallel concatenated convolutional codes,” IEEE Trans. Commun., vol. 44, pp. 591-600, May 1996.  J. B. Cain, G. C. Clark, and J. M. Geist, “Punctured convolutional codes of rate (n-1)/n and simplified maximum likelihood decoding,” IEEE Trans. Inform. Theory, vol. 25, pp. 97-100, Jan. 1979.  S. Dolinar and D. Divasalar, “Weight distribution for turbo codes using random and nonrandom permutations,” TDA Progress Report 42-122, Jet Propulsion Laboratory, Pasadena, Cal., Aug. 1995.  J. Ryu and O. Y. Takeshita, “On quadratic inverses for quadratic permutation polynomials over integer rings,” IEEE Trans. Inform. Theory , vol. 52, no. 3, Mar. 2006.  林蘇宏, “高效能餘數系統設計與信號處理應用之研究,” 國立雲林科技大學, 工程科技研究所博士論文, 中華民國九十七年六月。||摘要:||
行動通訊系統發展日趨成熟; 第三世代合作企劃(Third Generation Partnership Project - Long Term Evolution : 3GPP-LTE)擬定了通道編碼技術將採用錯誤更正能力極佳的渦輪碼(Turbo Code)進行編碼，而上傳速度(UpLink: UL)與下載速度(DownLink: DL)分別是50Mbps與100Mbps，將使無線通訊手持裝置在多媒體功能上更具多樣性。
而3GPP-LTE渦輪碼與以往不同是訊息區塊改為40位元至6144位元之間，共分成188階，無論是哪一個區塊大小，交錯器(Interleaver)都必須能在第一時間將交錯位址(Interleaver Address: IA)計算出來，而交錯器演算法主要是採用二次方程式排列(Quadratic Polynomial Permutation: QPP )，此將導致硬體實作上會浪費大量晶片面積以及功率消耗。所以本論文中將採用遞迴運算的方式來計算交錯位址，過程中只需加法器與多工器，能有效地提升硬體實作效能，但由於此遞迴疊代演算法中含有「x mod K」的運算，當x 2K，在硬體上就需兩次以上的減法運算，此將會影響交錯器的表現效能，所以本論文中再將遞迴疊代演算法稍作修正，使其每一個時脈(clock)都能輸出一筆交錯位址，以達到高傳輸速度的需求。
In the 3GPP-LTE (Third Generation Partnership Project - Long Term Evolution), channel coding technique is framed to employ the turbo code, which is skilled in error correction. With the development of the mobile communication systems, the uplink and downlink speeds are 50Mbps and 100Mbps, respectively. It makes the multimedia functions in the wireless communication devices more flexible.
The 3GPP-LTE turbo code, dividing into 188 levels, has the block sizes between 40 and 6144 bits. The interleaver address for every block is immediately computed by the interleaver address generator. Hardware implementation of the interleaver algorithm with quadratic polynomial permutation may lead to a waste of chip area and power consumption. Therefore, this thesis aims to calculate the interleaver address by the recursive computation. Only adders and multiplexers are needed during the recursive computation so that the effectiveness of hardware implementation is increased. However, when x 2K, the recursive computation containing (x mod K) will carry out the subtraction more than twice, which will affect the hardware performance of the interleaver. In this thesis, the recursive computation would be modified slightly so as to output one interleaver address for each clock cycle and achieve high throughput.
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