Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/8245
標題: 運用能隙之低參考電壓CMOS電路設計
CMOS circuit design for low reference voltage using bandgap
作者: 黃全興
關鍵字: reference voltage;參考電壓;bandgap reference voltage;能隙參考電壓
出版社: 電機工程學系
摘要: 
參考電壓產生器被廣泛的應用於類比電路及類比數位電路中,如 ADC、DAC、DRAM及快閃記憶體等等的電路。而這些電路的架構中需要一個在溫度變化和操作電壓飄移下還能提供穩定電壓的參考電壓。而能隙電壓參考電路的架構是一個普遍且廣放的被使用。由於可攜帶式電池操作系統的需求,低輸出的參考電壓、低壓操作及低功率消耗將成為未來產品的趨勢。本論文提出使用0.18m的CMOS的快閃記憶體製程實現兩個新型低壓操作之參考電壓電路。
這兩個電路都是利用CMOS的寄生垂直的雙載子電晶體來設計的。由於面積都不大所以所花費的成本可以降低。當溫度從-45oC變化至90oC時,參考電壓的變化少於 12mV。

Reference voltage generators are widely used in many applications from analog circuit to mixed-signal circuits such as ADC, DAC, DRAM and flash memories. These structures are required to provide a stable reference voltage with a low sensitivity to temperature and supply voltage. One of the most popular architectures is the band-gap reference. Due to the need of battery-operated systems for portability, low output reference voltage, low supply voltages and low power consumption will be the trends in the future VLSI products. Two new band-gap reference circuits operated at low supply voltages using 0.18m CMOS technology are presented in this thesis.
These two circuits are designed by vertically parasitical BJTs in CMOS technology. The chip area of the new BGR circuit is small. The deviation of Vref is less than 12mV for the temperature ranging from —45 oC to 90 oC.
URI: http://hdl.handle.net/11455/8245
Appears in Collections:電機工程學系所

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