Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/8272
DC FieldValueLanguage
dc.contributor陳中和zh_TW
dc.contributorChung-Ho Chenen_US
dc.contributor蔡智強zh_TW
dc.contributor許明華zh_TW
dc.contributorJichiang Tsaien_US
dc.contributorMing-Hwa Sheuen_US
dc.contributor.advisor賴永康zh_TW
dc.contributor.advisorYeong-Kang Laien_US
dc.contributor.author楊鑫平zh_TW
dc.contributor.authorYang, Shin-Pingen_US
dc.contributor.other中興大學zh_TW
dc.date2009zh_TW
dc.date.accessioned2014-06-06T06:41:18Z-
dc.date.available2014-06-06T06:41:18Z-
dc.identifierU0005-2108200815080600zh_TW
dc.identifier.citation[1] Video Codec for Audiovisual Services at p 64×Kbit/s, ITU-T Recommendation H.261, Mar. 1993. [2] Information Technology-Coding of Moving Pictures and Associated Audio for Digital Storage Media at up to about 1.5Mbit/s-Part 2: Video, ISO/IEC 11172-2, 1993. [3] Information Technolohy-Generic Coding of Moving Pictures and Associated Audio Information: Video, ISO/IEC 13818-2 and ITU-T Recommendation H.262, 1996. [4] Information Technology-Coding of Audio-Visual Objects-Part 2: Visual, ISO/IEC 14496-2, 1999. [5] Video Coding for Low Bit Rate Communication, ITU-T Recommendation H.263, Feb.1998. [6] Joint Video Team, Draft ITU-T Recommendation and Final Draft International Standard of Joint Video Specification, ITU-T Recommendation H.264 and ISO/IEC 14496-10 AVC, May 2003. [7] A. Joch, F. Kossentini, H. Schwarz, T. Wiegand, and G. j. Sullivan, „Performance comparison of video coding standards using Lagragian coder control,“ IEEE Transactions on Circuits and Systems for Video Technology, vol. 13, no. 7, pp. 688-703, July 2003. [8] G. J. Sullivan and T. Wiegand, “Rate-distortion optimization for video compression,” IEEE Signal Processing Magazine, vol. 15, no. 6, pp. 74-90, Nov. 1998. [9] T. Wiegand and B. Girod, “Lagrangian multiplier selection in bybrid video coder control,” in Proceedings of IEEE International Conference on Image Processing (ICIP'01), 2001, pp. 542-545. [10] Yu-Wen Huang and et al., “A 1.3TOPS H.264/AVC single-chip encoder for HDTV applications,” in Digest of Technical Papers of IEEE International Solid-State Circuits Conference (ISSCC), 2005, pp. 128-130. [11] Tung-Chien Chen and et al., “2.8 to 67.2mW Low-Power and Power-Aware H.264 Encoder for Mobile Applications,” in Symposium on VLSI Circuits Digest of Technical Papers, Jun. 2007. [12] Yu-Kun Lin, De-Wei Li and et al., “A 242mW 10mm2 1080p H.264/AVC High-Profile Encoder Chip,” in Digest of Technical Papers of IEEE International Solid-State Circuits Conference (ISSCC), 2008, pp. 314-315. [13] Zhenyu Liu, S. Yang, M. Shao, S. Li, Lingfeng Li, S. Ishiwata, M. Nakagawa, S. Goto, T. Ikenaga, “A 1.41W H.264/AVC Real-Time Encoder SOC for HDTV1080P,” in IEEE Symposium on VLSI Circuits, pp. 12-13. [14] H.-C. Chang, J.-W. Chen, C.-L. Su, Y.-C. Yang, Y. Li, C.-H. Chang, Z.-M. Chen, W.-S. Yang, C.-C. Lin, C.-W. Chen, J.-S. Wang, J.-I. Quo, “A 7mW-to-183mW Dynamic Quality-Scalable H.264 Video Encoder Chip,” in IEEE International Solid-State Circuits Conference (ISSCC'07), pp. 280-603. [15] T. Koga, K. Iinuma, A. Hirano, Y, Iijima, and T. Ishiguro, “Motion compensated interframe coding for video conferencing,” in Proceedings of National Telecommunication Conference, 1981, pp. C9.6.1-C9.6.5 [16] R. Li, B. Zeng, and M. L. Liou, “A new three-step search algorithm for block motion estimation,” IEEE Transactions on Circuits and Systems for Video Technology, vol. 4, no. 4, pp. 438-442, Aug. 1994 [17] L.-M. Po and W.-C. Ma, “A novel four-step search algorithm for fast block motion estimation,” IEEE Transactions on Circuits and Systems for Video Technology, vol. 6, no. 3, pp. 313-317, June 1996. [18] J. Y. Tham, S. Ranganath, M. Ranganath, and A. A. Kassim, “A novel unrestricted center-biased diamond search algorithm for block motion estimation,” IEEE Transactions on Circuits and Systems for Video Technology, vol. 8, no. 4, pp. 369-377, Aug. 1998. [19] S. Zhu and K.-K. Ma, “A new diamond search algorithm for fast block-matching motion estimation,” IEEE Transations on Image Processing, vol. 9, no. 2, pp. 287-290, Feb. 2000. [20] A. M. Tourapis, O. C. Au, M. L. Liou, G.Shen, and I. Ahmad, „Optimizing the MPEG-4 encoder-advanced diamond zonal search,“ in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS'00), 2000, pp. 674-677. [21] A. M. Tourapis, O.C. Au, and M. L. Liu, “Highly efficient predictive zonal algorithms for fast block-matching motion estimation,” IEEE Transactions on Circuits and Systems for Video Technology, vol. 12, no. 10, pp. 934-947, Oct. 2002. [22] C.-H. Cheung and L.-M. Po, “A novel cross diamond search algorithm for fast block motion estimation,” IEEE Transactions on Circuits and Systems for Video Technology, vol. 12, no. 12, pp. 1168-1177, DEC. 2002. [23] C.-W. Lam, L.0M. Po, and C. H. Cheung, “A novel kite-cross-diamond search algorithm for fst video coding and videoconferencing applications,” in Proceedings of IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP'04), 2004, pp. 365-368. [24] S. Zhu and K.-K. Ma, “A new diamond search algorithm for fast block matching motion estimation,” in Proceedings of IEEE International Conference on Image Processing (ICIP'97), 1997, pp. 292-296. [25] W. Li and E. Salari, “Succerrive elimination algorithm for motion estimation,” IEEE Transations on Image Processing, vol. 4, no. 1, pp. 105-107, Jan. 1995. [26] X. Q. Gao, C. J. Duanmu, and C. R. Zou, “A multilevel successive elimation algorithm for block matching motion estimation,” IEEE Transations on Image Processing, vol 9, no. 3, pp. 501-504, Mar. 2000. [27] M. Bruning and W. Niehsen, “Fast full-search block matching,” IEEE Transactions on Circuits and Systems for Video Technology, vol. 11, no. 2, pp. 241-247, Feb. 2001. [28] Digital Video Coding Group, ITU-T recommendation H.263 software implementation, Telenor R&D, 1995. [29] T.-C. Chen, Y.-W. Huang, L.-G. Chen, “Fully utilized and reusable architecture for fractional motion estimation of H.264/AVC,” in Proceedings of IEEE International Conference on Acoustics, Speech, and Signal Processing (ICASSP'04), 2004, vol.5, pp.9-12. [30] Chanqqi Yang, Goto. S., Ikenaga, T., “High performance VLSI architecture of fractional motion estimation in H.264 for HDTV,” in Proceedings of IEEE International Symposium on Circuits and Systems (ISCAS'06), 2006, pp. 4. [31] C.-L. Su, W.-S. Yang, Y.-L. Chen, Y.-L. Li, Y. Li, C.-W. Chen, J.-I. Guo, S.-Y. Tseng, “Low Complexity High Quality Fractional Motion Estimation Algorithm and Architecture Design for H.264/AVC,” in IEEE Asia Pacific Conference on Circuits and Systems (APCCS'06), 2006, pp. 578-581. [32] Y.-J. Wang, C.-C. Cheng, T.-S. Chang, “A Fast Algorithm and Its VLSI Architecture for Fractional Motion Estimation for H.264/MPEG-4 AVC Video Coding,” in IEEE Transactions on Circuits and Systems for Video Technology (CSVT'07), 2007, vol. 17, no.5, pp. 578-583. [33] I-M. Pao, M.-T. Sun, “Modeling DCT coefficients for fast video encoding,” in IEEE Transactions on Circuits and Systems for Video Technology, vol. 9, no. 4, pp. 608-616. [34] H. Wang, Sam Kwong, C.-W. Kok, “An Efficient Mode Decision Algorithm for H.264/AVC Encoding Optimization,” in IEEE Transactions on Multimedia, vol. 9, no. 4, pp. 882-888. [35] Y.-H. Kim, J.-W. Yoo, S.-W. Lee, J. Shin, J. Paik, H.-K. Jung, “Adaptive mode decision for H.264 encoder,” Electronics Letters, vol. 40, pp. 1172-1173. [36] Y.-M. Lee, Yinyi Lin, “An Improved Zero-Block Mode Decision Algorithm for H.264/AVC,” in IEEE International Conference on Image Processing (ICIP'07), vol. 5, pp. 293-296. [37] Y. Kim, Y. Choe, Y. Choi, “Fast mode decision algorithm for H.264 using AZCB prediction,” in International Conference on Consumer Electronics(ICCE'06), pp. 33-34. [38] L. Shen, Z. Liu, Z. Zhang, G. Wang, “A novel algorithm to fast mode decision with consideration about video texture in H.264,” in IEEE/ACS International Computer Systems and Applications (AICCSA'07), 2007, pp. 684-687. [39] C.-Y. Cho, N.S.-Y. Huang, J.-S. Wang, “Design of Computation-Aware Mode Decision Scheme for H.264/AVC,” in IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP'06), 2006, vol.2. [40] C. Kim, C.-C. J. Kuo, “Feature-Based Intra-/InterCoding Mode Selection for H.264/AVC,” in IEEE Transactions on Circuits and Systems for Video Technology (CSVT'07), vol.17, no. 4, pp.441-453. [41] H.-M. Wang, J.-K. Lin, J.-F. Yang, “Fast H.264 Inter Mode Decision Based on Inter and Intra Block Conditions,” in IEEE International Symposium on Circuits and Systems(ISCAS'07), pp. 3647-3650. [42] B. Zhan, B. Hou, R. Sotudeh, “An efficient fast mode decision algorithm for H.264/AVC intra/inter predictions,” in IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP'08), 2008, pp. 1057-1060. [43] S.-H. Ri, J. Ostermann, “Fast Mode Decision for H.264/AVG using Mode and RD Cost Prediction,” in First International Conference on Communications and Electronics (ICCE'06), pp. 264-269. [44] Q. Wang, D. Zhao, Wen Gao, Siwei Ma, “Low complexity RDO mode decision based on a fast coding-bits estimation model for H.264/AVC,” in IEEE International Symposium on Circuits and Systems (ISCAS'05), 2005, vol. 4. [45] Y.-W. Huang, B.-Y. Hsieh, S.-Y. Chien, S.-Y. Ma, L.-G. Chen, “Analysis and complexity reduction of multiple reference frames motion estimation in H.264/AVC,” in IEEE Transactions on Circuits and Systems for Video Technology, vol. 16, no. 4, pp. 507-522. [46] Z.-Y. Cheng, C.-H. Chen, B.-D. Liu, J.-F. Yang, “High throughput 2-D transform architectures for H.264 advanced video coders,” in IEEE Asia-Pacific Conference on Circuits and Systems, vol. 2, pp. 1141-1144. [47] Lam E.Y., Goodman. J.W., “A mathematical analysis of the DCT coefficient distributions for images,” in IEEE Transactions on Image Processing, vol. 9, no. 10, pp. 1661-1666. [48] Lam E.Y., “Analysis of the DCT coefficient Distributions for Document Coding,” in IEEE Signal Processing Letters, vol. 11, no. 2, part 1, pp. 97-100.zh_TW
dc.identifier.urihttp://hdl.handle.net/11455/8272-
dc.description.abstract我們提出了兩個快速演算法,第一種為預先模式選擇演算法(Pre-Mode Decision),主要是在IME級使用SAD找到每個模式的最佳移動向量,再計算每個模式最佳移動向量的SATD並且比較找出最佳的幀間模式分割後,進入浮點移動估算級找最佳的浮點移動向量,相較於傳統的演算法,我們可以省略約七分之六的浮點移動估算的運算量,相對在硬體上也降低了功率消耗,而在編碼品質上最大損失為0.2dB。 第二種為提早中斷移動估算演算法,相較於傳統使用Laplacian Distribution機率模型來預測residue的行為,我們使用了混和機率模型來達到更準確的行為預測來得到我們所需要的中斷門檻值,並且使用簡單且硬體適性的檢查機制來提早中斷整數移動估算器的運算而幾乎無損編碼品質與位元壓縮率,而在硬體上只需要LUT以及少數控制電路即可實現。此外利用機率上的特性來決定我們提早中斷次數上的策略,區分出無損畫質、第一級省電、第二級省電與極低功率消耗這四種功率消耗策略,以保持我們編碼的品質下達到省電的目的。 此外,我們提出了能減少記憶體存取的浮點移動估算器的硬體實現架構,相較於傳統四平行度架構能減少20%的記憶體頻寬,相對的減少了記憶體匯流排的功率消耗,此外,結合我們所提出的預選模式選擇演算法,電路只需工作頻率在62.5MHz與100MHz即可分別達到720P和1080P的規格。zh_TW
dc.description.abstractIn this paper, we present two hardware-oriented fast algorithms of H.264 inter prediction technique. First, we propose pre-mode decision algorithm to reduce computational complexity of inter mode decision because we use SAD and SATD from IME to find the best motion vector (MV) and MB partitions, respectively. Simulation results show that pre-mode decision has 0.2dB worst than JM12.2 at CIF sequence, and seven times of FME computations can be reduced. The other fast algorithm is early motion termination. In H.264 video coding, the motion vectors always equal to zero or motion vector predictor (MVP). And we use the conditions of skip mode modified in H.264 and additional condition for MV is (0,0) to replace MV is MVP originally, to calculate SAD and check it by modified threshold values before integer motion estimate. The threshold values are made by all zero block check method (AZBC) with hybrid mathematical statistical model, and it can be change by different model according to quantization parameter and our defined power budget. Simulation results show that early motion termination will terminate unnecessary estimated MB under different mode with different percentages and R/D curve performance of our defined high quality mode is almost as well as JM. Besides, in order to reduce memory access, we also propose a VLSI architecture design of fractional motion estimator. Compare to traditional architecture, we can reduce memory bandwidth by 20 % and power consumption of memory bus. According to the TSMC 0.18um CMOS technology, the proposed design costs 88.2k gates with the maximum working frequency of 100MHz. This design can realize the real-time H.264/AVC encoding on D1 video. Finally, we combine with our proposed pre-mode decision algorithm and fractional motion estimator. It can realize the real-time H.264/AVC encoding on 720P video and 1080P video at operation frequency of 62.5MHz and 100MHz, respectively.en_US
dc.description.tableofcontents第一章 引言 1 1.1 視訊壓縮技術與標準 1 1.2 H.264視訊編碼標準 1 1.3 論文組織 2 第二章 H.264幀間畫面演算法探討與回顧 3 2.1 JM參考原始碼基本幀間畫面編碼流程 3 2.2 運算量與平行度分析 7 2.3 幀間編碼技術探討與分析 9 2.3.1 整數移動估測運算 9 2.3.2 四分之一精確移動估測運算 12 2.3.3 多重區塊分割與模式選擇 16 第三章 幀間畫面編碼快速演算法 21 3.1 預先模式選擇演算法(Inter Pre-Mode Decision) 22 3.2 提早中斷行動估算演算法(Early Motion Termination) 28 3.3 效能分析 40 第四章 高精確度行動估算器之硬體實現 50 4.1 本文所提出的高精確度移動估算器架構 52 4.2 插補單元 53 4.3 處理單元 55 4.4 硬體實做與效能比較 57 4.4.1 晶片規格 57 4.4.2 晶片設計與驗證流程 57 4.4.3 程式碼涵蓋率 59 4.4.4 晶片實做結果 60 4.4.5 比較與貢獻 61 第五章 總結 63 參考書目 64zh_TW
dc.language.isoen_USzh_TW
dc.publisher電機工程學系所zh_TW
dc.relation.urihttp://www.airitilibrary.com/Publication/alDetailedMesh1?DocID=U0005-2108200815080600en_US
dc.subjectinter predictionen_US
dc.subject幀間預測zh_TW
dc.subjectfractional motion estimationen_US
dc.subjecth.264en_US
dc.subjectvlsien_US
dc.subject高精確度移動估計zh_TW
dc.title適用於H.264視訊編碼之幀間畫面預測演算法分析與高精確度移動估計電路架構設計與實現zh_TW
dc.titleAlgorithm Analysis of the Inter Prediction and the Architecture Design of Fractional Motion Estimation for H.264/AVC Applicationsen_US
dc.typeThesis and Dissertationzh_TW
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
item.openairetypeThesis and Dissertation-
item.cerifentitytypePublications-
item.fulltextno fulltext-
item.languageiso639-1en_US-
item.grantfulltextnone-
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