Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/8279
標題: 供低壓操作之新穎四相位高壓電荷幫浦
Novel four-phase high-voltage charge pumps for low-voltage operation
作者: 盧建豪
Lu, JainHao
關鍵字: charge pump;電荷幫浦;body effect;flash memory;low supply voltage;threshold voltage;clock generator;基底效應;快閃記憶體;低電壓操作;臨界電壓;時脈產生器
出版社: 電機工程學系
摘要: 
因應可攜式設備之需求增加,適合低電壓操作之高密度儲存媒體已於近幾年來高度的發展。電荷幫浦電路在低電壓快閃記憶體中扮演極重要之角色。本論文提出可運用於非揮發記憶體之電荷幫浦電路,它使用了建構於三井製程上之特殊基底連接技術以及負回授電壓調節架構。文中同時介紹電荷幫浦電路之原理與相關課題。隨著操作電壓大幅降低與高達-0.94v的臨界電壓,多級串接使得基底效應更加顯著,這將是幫浦電路設計上的一大挑戰。另外,藉由本論文所提出的回授調節器,能提供一穩定之輸出電壓。
本測試電路使用0.6微米製程來實現。模擬與量測結果顯示本十級電荷幫浦在1.2v供應電源與500pF負載電容的情況下,可有效的產生-10v之負高壓。

For rapidly increasing requirements of portable equipments, the high-density storages using low-supply voltage have been heavily developed in recent years. For low-voltage Flash memories, the charge pump is an important element in the peripheral circuits. In this thesis, a charge pump design is proposed. It uses special substrate connection with triple well process and negative feedback loop regulating structure for nonvolatile memory. The basic principles of the charge pumps and its related issues are illustrated in this thesis. The challenge to design a low-supply voltage pumping circuit is to overcome the influence of the body effect and the threshold voltage, which reaches —0.94V in PMOS, when the pumping circuits are cascaded in many stages. Besides, the feedback regulator generating a stable pumping voltage was also designed.
A test chip of the circuit was fabricated using 1P3M 0.6mm process. The simulation and the measurement show the new ten-stage charge pump can efficiently pump lower than —10V at supply voltage of 1.2V with 500pF loading capacitor.
URI: http://hdl.handle.net/11455/8279
Appears in Collections:電機工程學系所

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