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Novel four-phase high-voltage charge pumps for low-voltage operation
|關鍵字:||charge pump;電荷幫浦;body effect;flash memory;low supply voltage;threshold voltage;clock generator;基底效應;快閃記憶體;低電壓操作;臨界電壓;時脈產生器||出版社:||電機工程學系||摘要:||
For rapidly increasing requirements of portable equipments, the high-density storages using low-supply voltage have been heavily developed in recent years. For low-voltage Flash memories, the charge pump is an important element in the peripheral circuits. In this thesis, a charge pump design is proposed. It uses special substrate connection with triple well process and negative feedback loop regulating structure for nonvolatile memory. The basic principles of the charge pumps and its related issues are illustrated in this thesis. The challenge to design a low-supply voltage pumping circuit is to overcome the influence of the body effect and the threshold voltage, which reaches —0.94V in PMOS, when the pumping circuits are cascaded in many stages. Besides, the feedback regulator generating a stable pumping voltage was also designed.
A test chip of the circuit was fabricated using 1P3M 0.6mm process. The simulation and the measurement show the new ten-stage charge pump can efficiently pump lower than —10V at supply voltage of 1.2V with 500pF loading capacitor.
|Appears in Collections:||電機工程學系所|
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