Please use this identifier to cite or link to this item:

`http://hdl.handle.net/11455/8497`

標題: | 九十奈米金氧半場效電晶體之射頻特性分析與X頻段壓控震盪器之折衷設計 Analysis on 90nm MOSFET of Radio-Frequency Characteristics and Compromised Design of X-Band Voltage-Controlled Oscillator |

作者: | 彭廷皓 Peng, Ting-Hao |

關鍵字: | MOSFET;金氧半場效電晶體;gate resistance;substrate loss;X-band VCO;閘極電阻;基體損耗;高頻壓控震盪器 |

出版社: | 電機工程學系所 |

引用: | [1] David M. Pozar, Microwave Engineering, John Wiley & Sons, 2005. [2] Joseph F. White, High frequency techniques, John Wiley & Sons, 2004. [3] T. H. Lee, The design of CMOS radio-frequency integrated circuits, Cambridge Univ. Press, 2004. [4] Frank Ellinger, Radio frequency integrated circuits and technologies, Springer, 2007. [5] Ali M. Niknejad, Electromagnetics for high-speed analog and digital communication circuits, Cambridge Univ. Press, 2007. [6] Trond Ytterdal et al., Device modeling for analog and RF CMOS circuit design, John Wiley & Sons, 2003. [7] Xiaodong Jin et al., “An effective gate resistance model for CMOS RF and noise modeling,” in IEDM tech. Dig., Dec. 1998, p.981. [8] Yuhua Cheng et al., “Frequency-dependent resistive and capacitive components in RF MOSFETs.” IEEE Electron Device Lett., vol. 22, pp.333-335, July 2001. [9] Yuhua Cheng et al., “High frequency characterization of gate resistance in RF MOSFETs,” IEEE Electron Device Lett., vol. 22, pp.98-100, Feb 2001. [10] B. Razavi et al., “Impact of distributed gate resistance on the performance of MOS devices, ”IEEE Trans. on Circuits and Systems -I: Fundamental Theory and Applications., vol. 41, pp.750-754, Nov. 1994. [11] Christian Enz, “An MOS transistor model for RF IC design valid in all regions of operation,” IEEE Trans. on Microwave Theory and Techniques., vol. 50, pp.342-358, January 2002. [12] Ichjin Kwon et al., “A simple and analytical parameter-extraction method of a microwave MOSFET,” IEEE Trans. on Microwave Theory and Techniques., vol. 50, pp.1503-1509, June 2002. [13] Eyad Abou-Allam et al., “A small-signal MOSFET model for radio frequency IC application,” IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems., vol. 16, pp.437-447, May 1997. [14] Christian Enz et al, “MOS transistor modeling for RF IC design,” IEEE Trans. on Solid-State Circuits, vol. 35, pp.186-201, Feb. 2000 . [15] Steve Hung-Ning Jen et al, “Accurate modeling and parameter extraction for MOS transistor s valid up to 10 GHz,” IEEE Trans. on Electron Devices, vol. 11, pp.2217-2227, Nov. 1999. [16] Tajinder Manku, “Microwave CMOS-device physics and design,” IEEE Journal of Solid-State Circuits, vol. 34, pp.277-285, March 1999. [17] Yuhua Cheng et al., “MOSFET modeling for RF IC design,” IEEE Trans. on Electron Devices, vol. 52, pp.1286-1303, July 2005.. [18] Jeonghu Han et al., “A simple and accurate method for extracting substrate resistance of RF MOSFETs,” IEEE Electron Device Lett., vol. 23, pp.434-436, July 2002. [19] Chuan Kang Liang et al., “Systematic transistor and inductor modeling for millimeter-wave design,” IEEE Journal of Solid-State Circuits, vol. 44, pp.450-457, February 2009. [20] Yu-Chen Teng, UMC 90 nm Logic and Mixed-Mode 1P9M Low-K Process Design Support Manual, UMC Corp., April, 2009 [21] Ali Hajimiri et al., “Oscillator phase noise : A tutorial.” IEEE Journal of Solid-State circuits, vol. 35, pp. 326-336, March 2000. [22] Lin Jia et al., “9.3-10.4-GHz -band cross-coupled complementary oscillator with low phase-noise performance,” IEEE Transaction on Microwave Theory and Techniques, vol. 52, pp. 1273-1278, April 2004. [23] Ahmend H. Mostafa et al., “A CMOS VCO architecture suitable for sub-1 volt high-frequency (8.7-10 GHz) RF applications,” International Symposium on Low Power Electronics and Design, pp. 247-250, August 2001. [24] Jongsoo Lee et al., “A 8-GHz SiGe HBT VCO design on a low resistive silicon substrate using GSML” IEEE Transactions on Circuits and Systems I: Regular Papers, vol: 54, pp. 2128-2136, Oct. 2007. [25] Marc Tiebout, “Physical scaling of integrated inductor layout and model and its application to WLAN VCO design at 11GHz and 17GHz,” Proceedings of the 2003 International Symposium on Circuits and Systems, vol. 1, pp.1637-1640, May 2003. [26] D. B. Leeson, “A simple model of feedback oscillator noise spectrum,” Proc. .IEEE, vol. 54, pp.329-330, 1966. [27] Emed Hegazi et al., “A filtering technique to lower LC oscillator phase noise,” IEEE Journal of Solid-State circuits, vol. 36, pp. 1921-1930 , Dec. 2001. [28] R. Aparicio et al., “Circular Geometry Oscillators,” Proc. of IEEE International Solid-State Circuits Conference, pp. 378-79, Feb. 2004. [29] TSMC 0.18um Logic and Mixed-Mode 1P6M Process Design Support Manual, TSMC Corp. [30] Ulrich L. Rohde et al., The Design of Modern Microwave Oscillators for Wireless Applications: Theory and Optimization, John Wiley & Sons, 2005. |

摘要: | In this thesis, RF characteristics of multi-finger (MF) type MOSFET have been analyzed. This work studied the relationship between small-signal model of P-type MOSFET and layout geometry. The impact factors of gate resistance of MOSFET could involve two main items, the first one is the modified geometry factor which includes layout parameters and transmission line (TML) effect; Secondly, the material nature of poly-silicon and non-quasi static (NQS) effect would affect the effective gate sheet resistance. In addition, while the operation frequency was increasing continuously, the substrate loss exhibits an important influence obviously. Therefore, the helpful layout guides were also addressed and it could easily handle the magnitude of substrate network elements. Consequently, two figures of merit (FoMs) of MOSFET, cut off frequency and maximum oscillation frequency, were used to compare three different layout types, and induced some comprehensive geometry parameters for acquiring high FoM. The other researching topic is a methodology of design robust voltage-controlled oscillator (VCO). This literature proposed a design concept to compromise both power consumption and phase noise. Thus, two important parameters of LC tank which are equivalent loss conductance and effective resistance were found to get an optimal design. Finally, a practical chip has been completed on TSMC 0.18um 1P6M process, the measured results showed that the oscillator works the frequencies from 8.30GHz to 9.63GHz with phase noise -115.06dBc/Hz at 1MHz offset, and dissipates 14.76mW power. |

URI: | http://hdl.handle.net/11455/8497 |

其他識別: | U0005-1407200916380100 |

Appears in Collections: | 電機工程學系所 |

Show full item record

TAIR Related Article

#### Google Scholar^{TM}

Check
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.