Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/8855
標題: 高精確度能量調變直流-直流電壓轉換器
High-Accuracy Energy Modulation DC-DC Voltage Converter
作者: 陳奕豪
Chen, Yi-Hao
關鍵字: voltage converter;電壓轉換器;buck;current sense;降壓;電流感測
出版社: 電機工程學系所
引用: [1] 電子工程專輯, http://www.eettaiwan.com/ [2] 梁適安, “交換式電源供給器之理論與實務設計,” 全華圖書股份有限公司, 二版二刷, 2009. [3]王振宇, ”A current-mode buck regulator with an adjusted-slope compensation ramp,” 國立成功大學電機工程學系碩士論文, 中華民國九十四年七月. [4] H.-M. Chen, R. C. Chang, and P.-S. Lei, “An exact, high-efficiency PFM DC-DC boost converter with dynamic stored energy,” in Proc. International Conference on Electronics Circuits and Systems, Aug. 2008, pp. 622-625. [5] Y.-S. Lee and C.-J. Hsu, “High accuracy CMOS current sensing circuit for current mode control buck converter,” in Proc. International Conference on Power Electronics and Drive Systems, Nov. 2007, pp. 44-48. [6] T. Suntio, M. Rahkala, I. Gadoura, and K. Zenger, “Dynamic effects of inductor current ripple in average current mode control,” in Proc. Annual Conference of the IEEE on Industrial Electronics Society, Nov. 2001, vol.2, pp. 1072 – 1077. [7] S. Ziabakhsh, H. Alavi-Rad, and M. Mortazavi, “The design of a low-power high-speed current comparator in 0.35-μm CMOS technology,” Quality of Electronic Design, pp. 107-111, Apr. 2009. [8] C.-H. Chang and R. C. Chang, “A novel current sensing circuit for a current-mode control CMOS DC-DC buck converter,” in Proc. IEEE VLSI-TSA International Symposium on VLSI Design Automation and Test, Apr. 2005, pp.120-123. [9] C. Y. Leung, K. N. Leung, and P. K. T. Mok, “Design of a 1.5-V high-order curvature-compensated CMOS bandgap reference,” in Proc. International Symposium on Circuits and Systems, May 2004, vol. 1, pp. I-48-52. [10] K. N. Leung, P. K. T. Mok, and C. Y. Leung, “A 2-V 23-μA 5.3-ppm/℃ curvature-compensated CMOS bandgap voltage reference,” IEEE Journal of Solid-State Circuits, vol. 38, no. 3, pp. 561–564, Mar. 2003. [11] S.-M. Wu, C.-L. Wu, and C.-H. Chang, “A new adaptive mode-switching mechanism with current-mode CMOS DC-DC converter,” in Proc. International Symposium on Integrated Circuits, Jan. 2007, pp. 548-551. [12] R. lonescu, O Mita, F. Vladoianu, and G. Brezeanu, “Non inverting differential asymmetrical CMOS comparator with intrinsic hysteresis and adjustable asymmetry,” in Proc. International Semiconductor Conference, May 2007, vol. 2, pp. 555-558. [13] C.-J. Hsu and Y.S. Lee, “Current mode control integrated circuit with high accuracy current sensing circuit for buck converter,” in Proc. Annual Conference of the IEEE on Industrial Electronics Society, Mar. 2007, pp.1924-1929. [14] M. D. Ker, J. S. Chen, and C. Y. Chu, “New curvature-compensation technique for CMOS bandgap reference with sub-1-V operation,” IEEE Transactions on Circuits and Systems II, vol. 53, no. 8, pp. 667–671, Aug. 2006. [15] W.-R. Liou, M.-L. Yeh, and Y.-L. Kuo, “A high efficiency dual-mode buck converter ic for portable applications,” IEEE Transactions on Power Electronics, vol.23, no. 10, pp. 667-677, Oct. 2008. [16] K.-H. Cheng, C.-W. Su, and H.-H. Ko, “A high-accuracy and high-efficiency on-chip current sensing for current-Mode control CMOS DC-DC buck converter,” in Proc. IEEE International Conference on Electronics, Circuits and Systems, Nov. 2008, pp.458-461. [17] J.-J. Chen, “An active current-sensing constant-frequency HCC buck converter using phase-frequency-locked techniques,” IEEE Transactions on Ultrasonics, Ferroelectrics and Frequency Control, vol. 5, no. 4, pp. 761-769, Apr. 2008.
摘要: 
在現今攜帶式電子產品(手機、PDA…等)普及的時代,其產品之續航力成為我們必須關注的課題,因此針對電池能量的管理也更加重視,本論文即以電荷充放能量觀點來進行探討;達到有效的利用電荷能量以增加產品與電池的使用壽命。
論文中利用有別於以往PWM、與PFM直流轉直流的不同架構,以能量調變(PEM)的方式做為論文設計的主軸,並對其電路架構加以改良;此電路之特性在於偵測輸出電壓與電感電流上之關係,並送入控制電路,進而產生控制開關信號,並對其能量進行切割,避免充入多餘的能量造成浪費,間接達到有效率的應用;在本論文中,設計出一些不同架構之電路,以提升電路整體的穩定性與效率。
除了傳統Buck 架構,此電路由感測電流(sense current)、負載電流偵測(load current detector)、放電能量電路(discharge energy circuit)、比較器(comparator)以及可程式化能量放電控制(programmable energy discharge controller)組成,我們由回授電壓(feedback voltage)獲得電壓資料並送入負載電流偵測進行判斷後送入可程式化能量放電控制產生最適合當時負載電流的儲存和釋放能量參考值,並將此值與對由感測電流所獲得的功率電晶體電流資料進行比較,這樣的設計,能使電感電流及所儲存的能量隨著負載電流而做適當的改變,所以能有效降低能量的損耗和提高能量轉換效率;而放電能量電路則是用來取代PFM與PWM中振盪器的部份用來控制充放電的時間。
本電路採用TSMC 0.35μm製程來設計,電壓轉換為3.3V降壓至2V,可應用在一般手機的功率放大器,最高電壓轉換效率為95%,最大承受負載電流為500mA,晶片面積是1.4mm2。
URI: http://hdl.handle.net/11455/8855
其他識別: U0005-1808201020514600
Appears in Collections:電機工程學系所

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