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Room temperature fabrication of amorphous oxide semiconductor thin film transistors
|關鍵字:||高介電質;high-k;非晶氧化物半導體;室溫製程;amorphous oxide semiconductor;room temperature fabrication||出版社:||電機工程學系所||引用:|| H. Hosono, “Ionic amorphous oxide semiconductors: Material design, carrier transport, and device application,” J. Non-Cryst. Solids, vol. 352, pp. 851-858, 2006.  H. Hosono, M. Yasukawa and H. Kawazoe, “Novel oxide amorphous semiconductors: Transparent conducting amorphous oxides,” J. Non-Cryst. Solids, vol. 203, pp. 334-344, 1996.  C.-S. Yang, L. L. Smith, C. B. Arthur, and G. N. Parsons, “Stability of low-temperature amorphous silicon thin film transistors formed on glass and transparent plastic substrates,” J. Vac. Sci. Technol. B, Vol. 18, No. 2, pp. 683-689, 2000.  P. Gorrn, M. Sander, J. Meyer, M. Kroger, E. Becker, H. H. Johannes, W. Kowalsky and T. Riedl, “Towards see-through displays: Fully transparent thin-film transistors driving transparent organic light-emitting diodes,” Adv. Mater., vol.18, no.6, pp. 738-741, 2006.  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將上述室溫製程的高品質絕緣層及氧化釤作為薄膜電晶體的閘極絕緣層，來製作底部閘極結構氧化銦鋅或氧化銦鎵鋅薄膜電晶體。以經氧電漿處理氧化鉿當作絕緣層之氧化銦鋅薄膜電晶體和氧化銦鎵鋅薄膜電晶體，其遷移率為28 cm2/V-s和21 cm2/V-s，臨界電壓為-0.05 V和2.66 V，次臨界擺幅為0.35 V/dec和0.25 V/dec，on/off ratio為8×107和1×107。而由參雜鋁的氧化鉿當作絕緣層之氧化銦鋅薄膜電晶體，其遷移率為9.4 cm2/V-s，臨界電壓為1.67 V，次臨界擺幅為0.42 V/dec，on/off ratio為1.3×107。而由室溫濺鍍氧化釤當作絕緣層之氧化銦鋅薄膜電晶體和氧化銦鎵鋅薄膜電晶體，其遷移率平均值可高達88.7 cm2/V-s和55 cm2/V-s，臨界電壓平均值為1.08 V和2.17 V，次臨界擺幅平均值為0.26 V/dec和0.23 V/dec，on/off ratio平均值為1.7×107和3.1×107。此研究的全室溫製程提供了未來全室溫生產透明及軟性的高性能電子元件之可行性。
In recent years, green technology attracts a great deal of attention on reduced energy consumption and use of the nature non-depleted energy. The development of room-temperature process replace with the high consumption of high temperature annealing can indeed reduce energy consumption. We believe that the development of room-temperature process will be one of the trends for the future green technology.
In this work, hafnium oxide (HfO2) with high dielectric constant is in urgent need, HfO2 has been verified having a dielectric constant much higher than SiO2. ¬Thus, Oxygen plasma treatment process was used to passivate the non-stoichiometric HfO2 films deposited by DC magnetron sputtering. After optimal oxygen plasma treatment, the gate leakage, capacitance of voltage nonlinearity, surface roughness and dielectric breakdown voltage of HfOx films would be improved. XPS spectrum was used to analysis the non-stoichiometric HfO2 films after oxygen plasma treatment which demonstrate a higher concentration of incorporated oxygen atoms at the surface in comparison to the bulk HfOx. This simple method can maintain high-k dielectric deposition process at room temperature by sputtering. Moreover, it is also validated the Al incorporation of the HfAlOx films by reactive co-sputter system at room temperature. We can confirm the components of deposited film by XPS analysis which shows the Al content of HfAlOx film increasing with the increase of sputtering power on aluminum target. Root-mean-square of surface roughness decreases with increasing Al content. The electric characteristics of MIM devices have also been improved with the Al incorporation. On the basis of the XPS analysis, the intrinsic defects passivate at room temperature due to the incorporation of Al in HfOx films being elucidated by XPS analyses and electrical measurements.
We used high-k dielectric such as HfO2, HfAlO and Sm2O3 as gate insulator for fabricating IZO or IGZO TFT. The a-IZO and O2 plasma-treated HfO2 are used as the channel and the insulator in transparent TFTs, respectively. The IZO-based transparent TFT with low gate leakage current shows that the field effect saturation mobility, Ion/Ioff ratio, sub-threshold swing, and threshold voltage are extracted to be 28 cm2/V-s, 8.17�107, 0.35 V/decade, and -0.05 V, respectively. In addition, the IGZO and HfO2 were used as channel and insulator in a transparent TFT, respectively. It showed that the field effect saturation mobility, Ion/Ioff ratio, sub-threshold swing, and threshold voltage were extracted to be 21 cm2/V-s, 1.09�107, 0.258 V/decade, and 2.66 V, respectively. Moreover, with the best electric characteristics obtained from HAO3, it has the highest Al incorporation in the formation of HfAlOx while using that as the gate insulator in a transparent IGZO TFT. The device shows 1.34�107 of Ion/Ioff ratio, accepted interface-trap density, 9.48 cm2/V-s of field effect saturation mobility, low operation voltage, and low gate leakage current. Then, the IZO and Sm2O3 were used as channel and insulator in a transparent TFT, respectively. It showed that the field effect saturation mobility, Ion/Ioff ratio, sub-threshold swing, and threshold voltage were extracted to be 138.8 cm2/V-s, 9.49�106, 0.308 V/decade, and 1.31 V, respectively. The IGZO and Sm2O3 were used as channel and insulator in a transparent TFT, respectively. It showed that the field effect saturation mobility, Ion/Ioff ratio, sub-threshold swing, and threshold voltage were extracted to be 46.8 cm2/V-s, 4.87�107, 0.197 V/decade, and 1.962 V, respectively.
The influence of fabrication process is comparing the top-gate TFT with the bottom-gate TFT. The bottom-gate TFTs exhibit the optimum electrical characteristics, but the top-gate TFTs do not demonstrate even typical electrical characteristics. Therefore, the interface between a-IZO film and HfO2 film in the top-gate structure may be contaminated or damaged during the active layer patterning and gate insulator deposition process. The top-gate TFTs could, however, show good electrical characteristics by reducing the DC sputtering power of depositing gate insulator. In the bias stability, the Vth shift in the top-gate a-IZO TFT is more obvious than that in the bottom-gate a-IZO TFT because the interface, between the a-IZO and HfO2 in top-gate a-IZO TFT, is subjected to higher energy bombardment than that in the bottom-gate a-IZO TFT.
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