Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/9089
標題: 以實數結構型基因演算法設計合成生物邏輯電路
Design of Synthetic Genetic Logic Circuits Based on RSGA
作者: 張晏彰
Chang, Yen-Chang
關鍵字: 基因演算法;Genetic algorithm;實數型結構基因演算法;多目標最佳化;基因震盪器;生物邏輯閘;順式規則輸入函數;Real structured genetic algorithm;Muliobjective optimization;genetic oscillator;biological logic gate;cis-regular input function
出版社: 電機工程學系所
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摘要: 
本論文結合了實數型基因演算法(real genetic algorithm)與結構型基因演算法(structured algorithm)的優點,發展出新穎的實數型結構基因演算法(real structured genetic algorithm),並將其作為基因震盪器以及生物邏輯閘的最佳化設計策略。
對一般基因震盪器而言,本演算法適用於各種基因數設計,將震盪器之階數最小化。本論文證明使用此演算法設計兼具高效能以及可調出架構簡單的基因震盪器。
在實務上,本論文所提出的方法可進一步延伸並應用於生物邏輯閘設計。針對順式規則輸入函數(CRIF)非線性模型,我們使用RSGA演算法進行多目標最佳化。最佳化的目標除了包含邏輯效應準確度,尚包含邏輯的高低落差。
透過電腦模擬印證,此實數型結構基因演算法不但能夠收斂,使用該演算法所設計出的基因震盪器以及生物邏輯閘分別具有比使用傳統基因演算法與類神經網路設計的元件具備更優異的效能。透過最佳化邏輯閘設計,我們也實現穩態基本邏輯閘、組合邏輯電路以及循序邏輯電路。

This thesis develops a real structured genetic algorithm (RSGA) which combines advantages of the traditional real genetic algorithm (RGA) with those of the structured genetic algorithm (SGA) and applies it as an optimization strategy for genetic oscillator and biological logic gate design.
For the generalized genetic oscillator design, our proposed approach fulfills all types of genes by minimizing the order of oscillator while searching for the optimal network parameters. The design approach is shown to be capable of yielding genetic oscillators with a simple structure while searching for the optimal network parameters.
Furthermore, the proposed approach has also been applied to the biological logic gate design. For a nonlinear model with the cis-regular input function (CRIF), we define the multi-objective performance indices that are related to the accuracy of logic state and the difference between the high and low logic levels.
Simulation studies show the effectiveness of the proposed algorithm, when it is used to generate genetic oscillators, biological logic gates. For the genetic oscillator design, we show that our proposed approach performs better than traditional GAs in the sense that a cheaper structure can be obtained. For the logic gate design, we can establish a conceptualized design framework of steady-state combinational and sequential logic circuits.
URI: http://hdl.handle.net/11455/9089
其他識別: U0005-1608201216024400
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