Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/93927
標題: A 2.5-Gb/s DLL-Based Burst-Mode Clock and Data Recovery Circuit With 4x Oversampling
作者: Jung-Mao Lin
Ching-Yuan Yang
Hsin-Ming Wu
Project: IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 23, Issue 4, Page(s) 791-795
URI: http://hdl.handle.net/11455/93927
Appears in Collections:電機工程學系所

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