Please use this identifier to cite or link to this item: http://hdl.handle.net/11455/99141
DC FieldValueLanguage
dc.contributor.authorLi, Mengjiaozh_TW
dc.contributor.authorLin, Che-Yizh_TW
dc.contributor.authorYang, Shih-Hsienzh_TW
dc.contributor.authorChang, Yuan-Mingzh_TW
dc.contributor.authorChang, Jen-Kueizh_TW
dc.contributor.authorYang, Feng-Shouzh_TW
dc.contributor.authorZhong, Chaorongzh_TW
dc.contributor.authorJian, Wen-Binzh_TW
dc.contributor.authorLien, Chen-Hsinzh_TW
dc.contributor.authorHo, Ching-Hwazh_TW
dc.contributor.authorLiu, Heng-Juizh_TW
dc.contributor.authorHuang, Rongzh_TW
dc.contributor.authorLi, Wenwuzh_TW
dc.contributor.authorLin, Yen-Fuzh_TW
dc.contributor.author林彥甫zh_TW
dc.contributor.authorChu, Junhaozh_TW
dc.date2018-11-
dc.date.accessioned2019-10-16T06:07:20Z-
dc.date.available2019-10-16T06:07:20Z-
dc.identifier.urihttp://hdl.handle.net/11455/99141-
dc.description.abstractTunability and stability in the electrical properties of 2D semiconductors pave the way for their practical applications in logic devices. A robust layered indium selenide (InSe) field-effect transistor (FET) with superior controlled stability is demonstrated by depositing an indium (In) doping layer. The optimized InSe FETs deliver an unprecedented high electron mobility up to 3700 cm2 V-1 s-1 at room temperature, which can be retained with 60% after 1 month. Further insight into the evolution of the position of the Fermi level and the microscopic device structure with different In thicknesses demonstrates an enhanced electron-doping behavior at the In/InSe interface. Furthermore, the contact resistance is also improved through the In insertion between InSe and Au electrodes, which coincides with the analysis of the low-frequency noise. The carrier fluctuation is attributed to the dominance of the phonon scattering events, which agrees with the observation of the temperature-dependent mobility. Finally, the flexible functionalities of the logic-circuit applications, for instance, inverter and not-and (NAND)/not-or (NOR) gates, are determined with these surface-doping InSe FETs, which establish a paradigm for 2D-based materials to overcome the bottleneck in the development of electronic devices.zh_TW
dc.language.isoenzh_TW
dc.relationAdvanced materials (Deerfield Beach, Fla.), Volume 30, Issue 44, Page(s) e1803690.zh_TW
dc.subject2D electronicszh_TW
dc.subjectInSe transistorszh_TW
dc.subjectlogic circuitszh_TW
dc.subjectlow‐frequency noisezh_TW
dc.subjectsurface charge transfer dopingzh_TW
dc.titleHigh Mobilities in Layered InSe Transistors with Indium-Encapsulation-Induced Surface Charge Dopingzh_TW
dc.typeJournal Articlezh_TW
dc.identifier.doi10.1002/adma.201803690zh_TW
dc.awards2018zh_TW
item.grantfulltextrestricted-
item.openairetypeJournal Article-
item.cerifentitytypePublications-
item.languageiso639-1en-
item.fulltextwith fulltext-
item.openairecristypehttp://purl.org/coar/resource_type/c_18cf-
Appears in Collections:奈米科學研究所
Files in This Item:
File Description SizeFormat Existing users please Login
152.pdf3.13 MBAdobe PDFThis file is only available in the university internal network   
Show simple item record
 

Google ScholarTM

Check

Altmetric

Altmetric


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.